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    Method for fabricating a component having an electrical contact region
    31.
    发明授权
    Method for fabricating a component having an electrical contact region 有权
    一种具有电接触区域的部件的制造方法

    公开(公告)号：US07435605B2

    公开(公告)日：2008-10-14

    申请号：US11825895

    申请日：2007-07-09

    Applicant: Stefan Illek ,  Peter Stauss ,  Andreas Ploessl ,  Gudrun Diepold ,  Ines Pietzonka ,  Wilhelm Stein ,  Ralph Wirth ,  Walter Wegleiter

    Inventor： Stefan Illek ,  Peter Stauss ,  Andreas Ploessl ,  Gudrun Diepold ,  Ines Pietzonka ,  Wilhelm Stein ,  Ralph Wirth ,  Walter Wegleiter

    IPC: H01L21/00

    CPC classification number: H01L33/40 ,  H01L33/0079 ,  H01L33/30 ,  Y10S438/933

    Abstract: A method for fabricating a component having an electrical contact region on an n-conducting AlGaInP-based or AlGaInAs-based outer layer of an epitaxially grown semiconductor layer sequence, in which electrical contact material, which includes Au and at least one dopant, is applied and the outer layer is then annealed. The dopant contains at least one element selected from the group consisting of Ge, Si, Sn and Te. Also, a component is disclosed which includes an epitaxially grown semiconductor layer sequence with an active zone which emits electromagnetic radiation, the semiconductor layer sequence having an n-conducting AlGaInP-based or AlGaInAs-based outer layer, to which an electrical contact region is applied using the method described.

    Abstract translation: 一种制造在外延生长的半导体层序列的基于n导电AlGaInP基或AlGaInP的外层上具有电接触区域的部件的方法，其中应用包括Au和至少一种掺杂剂的电接触材料 然后将外层退火。 掺杂剂含有选自Ge，Si，Sn和Te中的至少一种元素。 此外，公开了一种组件，其包括具有发射电磁辐射的有源区的外延生长的半导体层序列，所述半导体层序列具有基于导电AlGaInP或AlGaInAs的外层，施加电接触区域 使用所述方法。

    Semiconductor body and semiconductor chip comprising a semiconductor body
    32.
    发明申请
    Semiconductor body and semiconductor chip comprising a semiconductor body 有权
    包括半导体本体的半导体体和半导体芯片

    公开(公告)号：US20080073658A1

    公开(公告)日：2008-03-27

    申请号：US11904204

    申请日：2007-09-26

    Applicant: Ralph Wirth

    Inventor： Ralph Wirth

    IPC: H01L29/221

    CPC classification number: H01L33/145 ,  H01L33/405 ,  H01L33/42 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor body (2), comprising a semiconductor layer sequence with an active region (3) suitable for generating radiation. The semiconductor layer sequence comprises two contact layers (6, 7), between which the active region is arranged. The contact layers are assigned a respective connection layer (12, 13) arranged on the semiconductor body. The respective connection layer is electrically conductively connected to the assigned contact layer. The respective connection layer is arranged on that side of the assigned contact layer which is remote from the active region. The connection layers are transmissive to the radiation to be generated in the active region, and the contact layers are of the same conduction type.

    Abstract translation: 一种半导体本体（2），包括具有适于产生辐射的有源区（3）的半导体层序列。 半导体层序列包括两个接触层（6,7），其间布置有源区。 接触层被分配布置在半导体主体上的相应的连接层（12,13）。 相应的连接层导电地连接到所分配的接触层。 相应的连接层布置在远离有源区域的分配接触层的该侧。 连接层对于在有源区域中要产生的辐射是透射的，并且接触层具有相同的导电类型。

    Method for fabricating a component having an electrical contact region
    33.
    发明申请
    Method for fabricating a component having an electrical contact region 有权
    一种具有电接触区域的部件的制造方法

    公开(公告)号：US20070264740A1

    公开(公告)日：2007-11-15

    申请号：US11825895

    申请日：2007-07-09

    Applicant: Stefan Illek ,  Peter Stauss ,  Andreas Ploessl ,  Gudrun Diepold ,  Ines Pietzonka ,  Wilhelm Stein ,  Ralph Wirth ,  Walter Wegleiter

    Inventor： Stefan Illek ,  Peter Stauss ,  Andreas Ploessl ,  Gudrun Diepold ,  Ines Pietzonka ,  Wilhelm Stein ,  Ralph Wirth ,  Walter Wegleiter

    IPC: H01L33/00

    CPC classification number: H01L33/40 ,  H01L33/0079 ,  H01L33/30 ,  Y10S438/933

    Abstract: A method for fabricating a component having an electrical contact region on an n-conducting AlGaInP-based or AlGaInAs-based outer layer of an epitaxially grown semiconductor layer sequence, in which electrical contact material, which includes Au and at least one dopant, is applied and the outer layer is then annealed. The dopant contains at least one element selected from the group consisting of Ge, Si, Sn and Te. Also, a component is disclosed which includes an epitaxially grown semiconductor layer sequence with an active zone which emits electromagnetic radiation, the semiconductor layer sequence having an n-conducting AlGaInP-based or AlGaInAs-based outer layer, to which an electrical contact region is applied using the method described.

    Abstract translation: 一种制造在外延生长的半导体层序列的基于n导电AlGaInP基或AlGaInP的外层上具有电接触区域的部件的方法，其中应用包括Au和至少一种掺杂剂的电接触材料 然后将外层退火。 掺杂剂含有选自Ge，Si，Sn和Te中的至少一种元素。 此外，公开了一种组件，其包括具有发射电磁辐射的有源区的外延生长的半导体层序列，该半导体层序列具有基于n导电AlGaInP或AlGaInAs的外层，施加电接触区域 使用所述方法。

    LED with a coupling-out structure
    34.
    发明授权
    LED with a coupling-out structure 失效

    公开(公告)号：US06661033B2

    公开(公告)日：2003-12-09

    申请号：US10331924

    申请日：2002-12-30

    Applicant: Norbert Linder ,  Ralph Wirth ,  Heribert Zull

    Inventor： Norbert Linder ,  Ralph Wirth ,  Heribert Zull

    IPC: H01L3300

    CPC classification number: H01L33/38 ,  H01L33/14 ,  H01L33/20

    Abstract: On an upper side there is a structured output coupling layer with flanks which are aligned at an angle between 60° and 88° with respect to a layer plane and which form boundaries for output coupling areas provided for the emergence of radiation and offset from one another. The output coupling areas are formed as flat truncated cones and can be rippled or zigzagged at the flanks, in order to increase the probability that the radiation produced strikes an outer interface of the output coupling layer more steeply than at a limiting angle of total reflection.

    OPTOELECTRONIC SEMICONDUCTOR COMPONENT
    37.
    发明申请
    OPTOELECTRONIC SEMICONDUCTOR COMPONENT 有权
    光电子半导体元件

    公开(公告)号：US20140246688A1

    公开(公告)日：2014-09-04

    申请号：US14347293

    申请日：2012-08-30

    Applicant: Andreas Dobner ,  Joerg Sorg ,  Ralph Wirth

    Inventor： Andreas Dobner ,  Joerg Sorg ,  Ralph Wirth

    IPC: H01L33/62 ,  H01L33/60

    CPC classification number: H01L33/62 ,  H01L25/0753 ,  H01L33/60 ,  H01L2224/48137 ,  H01L2924/3025 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: An optoelectronic semiconductor component includes: at least one optoelectronic semiconductor chip, a leadframe having one a plurality of leadframe parts, at least two electrical connection means via which the semiconductor chip is electrically contact-connected to the leadframe, and a potting body, which is fitted to the leadframe and mechanically supports the latter, wherein the one or at least one of the leadframe parts is provided with a reflective coating at a top side, the semiconductor chip is fitted on the reflective coating at the top side, the leadframe includes at least two contact locations, onto which the connection means are directly fitted, and the contact locations are formed from a material that is different from the reflective coating.

    Abstract translation: 光电子半导体部件包括：至少一个光电子半导体芯片，具有一个多个引线框架部件的引线框架，至少两个电连接装置，半导体芯片通过该电连接装置电接触连接到引线框架，以及灌封体 装配到引线框架并机械地支撑后者，其中引线框架部件中的一个或至少一个在顶侧设置有反射涂层，半导体芯片安装在顶侧的反射涂层上，引线框架包括在 至少两个接触位置，连接装置直接配合到其上，并且接触位置由与反射涂层不同的材料形成。

    Method for producing an area having reduced electrical conductivity within a semiconductor layer and optoelectronic semiconductor element
    39.
    发明授权
    Method for producing an area having reduced electrical conductivity within a semiconductor layer and optoelectronic semiconductor element 有权
    用于制造半导体层内的导电性降低的区域和光电子半导体元件的方法

    公开(公告)号：US08293553B2

    公开(公告)日：2012-10-23

    申请号：US11597928

    申请日：2005-04-25

    Applicant: Stefan Illek ,  Wilhelm Stein ,  Robert Walter ,  Ralph Wirth

    Inventor： Stefan Illek ,  Wilhelm Stein ,  Robert Walter ,  Ralph Wirth

    IPC: H01L21/00 ,  H01L23/58

    CPC classification number: H01L21/02461 ,  H01L21/02463 ,  H01L21/02554 ,  H01L21/02573 ,  H01L21/02631 ,  H01L21/7605 ,  H01L33/0062 ,  H01L33/42

    Abstract: In a method for producing at least at least one area (8) with reduced electrical conductivity within an electrically conductive III-V semiconductor layer (3), a ZnO layer (1) is applied to the area (8) of the semiconductor layer (3) and subsequently annealed at a temperature preferably between 300° C. and 500° C. The ZnO layer (1) is preferably deposited on the III-V semiconductor layer (3) at a temperature of less than 150° C., preferably at a temperature greater than or equal to 25° C. and less than or equal to 120° C. The area (8) with reduced electrical conductivity is preferably located in a radiation emitting optoelectronic device between the active zone (4) and a connecting contact (7) in order to reduce current injection into the areas of the active zone (4) located opposite to the connecting contact (7).

    Abstract translation: 在用于在导电III-V半导体层（3）内制造具有降低的导电性的至少一个区域（8）的方法中，将ZnO层（1）施加到半导体层的区域（8） 3），然后在优选300℃至500℃的温度下退火。优选在低于150℃的温度下将ZnO层（1）沉积在III-V半导体层（3）上，优选 在大于或等于25℃且小于或等于120℃的温度下，具有降低的导电性的区域（8）优选位于激活区域（4）和连接 触点（7），以便减少电流注入位于与连接触点（7）相对的有源区域（4）的区域中。

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