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公开(公告)号：US12149389B2
公开(公告)日：2024-11-19
申请号：US18155999
申请日：2023-01-18
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Jiang Chen , Qiu Sha
Abstract: Systems, devices, and methods for isolating digital signals are described. A carrier signal can be modulated using a first signal to generate a first modulated signal. The carrier signal and the first modulated signal can be transmitted through a forward path in an isolation barrier, where transmitting the carrier signal through the isolation barrier can transform the carrier signal into a delayed carrier signal. The first modulated signal can be demodulated to recover the first signal. The delayed carrier signal can be modulated using a second signal to generate a second modulated signal. The delayed carrier signal and the second modulated signal can be transmitted through a return path in the isolation barrier, where the return path and the forward path has opposite directions.
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公开(公告)号：US11095133B2
公开(公告)日：2021-08-17
申请号：US16889407
申请日：2020-06-01
Applicant: RENESAS ELECTRONICS AMERICA INC.
Inventor： Kota Kano , Tetsuo Sato , Shigeru Maeta
IPC: H02J7/00
Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.
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公开(公告)号：US10147722B2
公开(公告)日：2018-12-04
申请号：US15235878
申请日：2016-08-12
Applicant: Renesas Electronics America Inc.
Inventor： Kenji Yoshida , Tetsuo Sato , Shigeru Maeta , Toshio Kimura
IPC: H01L27/06 , H01L25/065 , H01L27/12 , H01L29/786 , H01L23/538 , H03K7/08 , H01L23/528
Abstract: A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process.
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公开(公告)号：US20180083467A1
公开(公告)日：2018-03-22
申请号：US15827169
申请日：2017-11-30
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Shigeru Maeta , Toshio Kimura , Atsushi Mitamura , Akira Negishi , Gary S. Jacobson
CPC classification number: H02J7/0045 , H02J7/0029 , H02J7/022
Abstract: A transformer less battery charger system. In one embodiment, the battery charger system includes input terminals for receiving an AC voltage, output terminals for receiving terminals of a rechargeable battery pack, and a non-isolated DC-DC converter coupled between the input terminals and the output terminals. A device is also coupled somewhere between the input terminals and the output terminals. The device is configured to selectively and indirectly couple the input terminals to the output terminals. More particularly, the device indirectly couples the input terminals to the output terminals when the rechargeable battery pack terminals are received by the output terminals, and the device indirectly decouples the input terminals from the output terminals when the rechargeable battery pack terminals are separated from the output terminals.
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公开(公告)号：US20180026455A1
公开(公告)日：2018-01-25
申请号：US15657134
申请日：2017-07-22
Applicant: Renesas Electronics America Inc.
Inventor： Kota Kano , Tetsuo Sato , Shigeru Maeta
IPC: H02J7/00
Abstract: A simple battery and battery charger. In one embodiment, the battery charger includes an output terminal that provides a charging voltage Vout and charging current Iout. The battery is contained in a battery pack having an input terminal, which can be connected to the output terminal in order to receive Vout and Iout. The battery charger may include a first circuit for controlling the magnitude of Vout. The battery pack may include a second circuit that generates a control signal when the output terminal is connected to the input terminal. The first circuit is configured to control the magnitude of Vout based on the control signal.
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Patent Agency Ranking
公开(公告)号：US09843206B2
公开(公告)日：2017-12-12
申请号：US14851433
申请日：2015-09-11
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Shigeru Maeta , Toshio Kimura , Atsushi Mitamura , Akira Negishi , Gary S. Jacobson
CPC classification number: H02J7/0045 , H02J7/0029 , H02J7/022
Abstract: A transformer less battery charger system. In one embodiment, the battery charger system includes input terminals for receiving an AC voltage, output terminals for receiving terminals of a rechargeable battery pack, and a non-isolated DC-DC converter coupled between the input terminals and the output terminals. A device is also coupled somewhere between the input terminals and the output terminals. The device is configured to selectively and indirectly couple the input terminals to the output terminals. More particularly, the device indirectly couples the input terminals to the output terminals when the rechargeable battery pack terminals are received by the output terminals, and the device indirectly decouples the input terminals from the output terminals when the rechargeable battery pack terminals are separated from the output terminals.
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37.发明申请公开(公告)号：US20170336265A1
公开(公告)日：2017-11-23
申请号：US15659009
申请日：2017-07-25
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Ryotaro Kudo
IPC: G01K7/00 , G01K7/01 , H05K1/02 , G06F1/26 , H01L23/34 , G01K1/02 , G01K3/00 , G06F1/20 , G01K3/14
CPC classification number: G01K7/00 , G01K1/026 , G01K3/00 , G01K7/01 , G01K2003/145 , G06F1/206 , G06F1/26 , H01L23/34 , H01L2924/0002 , H05K1/0201 , H05K1/0262 , H05K2201/10151 , H05K2201/10166 , H05K2203/163 , Y02D10/16 , H01L2924/00
Abstract: An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.
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公开(公告)号：US20170264121A1
公开(公告)日：2017-09-14
申请号：US15606577
申请日：2017-05-26
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Tsutomu Kawano , Koji Kashimoto , Takao Hidaka , Tsuyoshi Ota , Ryoji Kato
CPC classification number: H02J7/0047 , G01R19/0092 , G01R31/382 , H01M10/48 , H02J7/00 , H02J7/0031 , H02J7/0068 , H02J2007/0037 , H02J2007/004
Abstract: A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.
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公开(公告)号：US08786237B2
公开(公告)日：2014-07-22
申请号：US13755812
申请日：2013-01-31
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Isao Shimura , Tsutomu Kawano
IPC: G05B5/00
CPC classification number: G05D23/1932 , G05D23/1931 , G05D23/20 , G06F1/206 , H01L23/34 , H01L23/467 , H01L2924/0002 , Y02D10/16 , H01L2924/00
Abstract: According to an embodiment of the invention, an apparatus is provided which includes a microprocessor, and a built-in temperature sensor configured to measure a temperature of the microprocessor as a reference temperature. The apparatus further includes external temperature sensors, where at least one of the external temperature sensors is configured to measure the temperature of the microprocessor. The microprocessor is configured to make an external temperature calibration using the reference temperature measured by the built-in temperature monitor. Each of the external temperature sensors is configured to monitor temperature information of a component and provide the temperature information to the microprocessor.
Abstract translation: 根据本发明的实施例，提供了一种装置，其包括微处理器和内置的温度传感器，其被配置为测量微处理器的温度作为参考温度。 该装置还包括外部温度传感器，其中至少一个外部温度传感器被配置成测量微处理器的温度。 微处理器配置为使用由内置温度监测器测量的参考温度进行外部温度校准。 每个外部温度传感器被配置为监视部件的温度信息并将温度信息提供给微处理器。
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公开(公告)号：US20130146275A1
公开(公告)日：2013-06-13
申请号：US13755812
申请日：2013-01-31
Applicant: Renesas Electronics America Inc.
Inventor： Tetsuo Sato , Isao Shimura , Tsutomu Kawano
IPC: G05D23/19
CPC classification number: G05D23/1932 , G05D23/1931 , G05D23/20 , G06F1/206 , H01L23/34 , H01L23/467 , H01L2924/0002 , Y02D10/16 , H01L2924/00
Abstract: According to an embodiment of the invention, an apparatus is provided which includes a microprocessor, and a built-in temperature sensor configured to measure a temperature of the microprocessor as a reference temperature. The apparatus further includes external temperature sensors, where at least one of the external temperature sensors is configured to measure the temperature of the microprocessor. The microprocessor is configured to make an external temperature calibration using the reference temperature measured by the built-in temperature monitor. Each of the external temperature sensors is configured to monitor temperature information of a component and provide the temperature information to the microprocessor.
Abstract translation: 根据本发明的实施例，提供了一种装置，其包括微处理器和内置的温度传感器，其被配置为测量微处理器的温度作为参考温度。 该装置还包括外部温度传感器，其中至少一个外部温度传感器被配置成测量微处理器的温度。 微处理器配置为使用由内置温度监测器测量的参考温度进行外部温度校准。 每个外部温度传感器被配置为监视部件的温度信息并将温度信息提供给微处理器。
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