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公开(公告)号：US20170109273A1
公开(公告)日：2017-04-20
申请号：US15061746
申请日：2016-03-04
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
CPC classification number: G06F12/0246 , G06F3/0605 , G06F3/064 , G06F3/0679 , G06F2212/214 , G06F2212/657 , G06F2212/7201 , G06F2212/7205
Abstract: A memory system may include a nonvolatile memory device including a plurality of blocks each including a plurality of pages, and a controller that selects a mapping block from the plurality of blocks, stores address information corresponding to each of other blocks, except for the mapping block and a free block among the plurality of blocks, in each of the plurality of pages, searches for a block including no valid page among the other blocks, and invalidates a page of the mapping block storing the address information corresponding to the searched block.
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公开(公告)号：US20170017418A1
公开(公告)日：2017-01-19
申请号：US14959861
申请日：2015-12-04
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE , Jin-Woong KIM
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/0616 , G06F3/065 , G06F3/0652 , G06F3/0679 , G06F3/068 , G06F12/0238 , G06F2212/7211
Abstract: A memory system includes: a memory device including a plurality of memory blocks, and suitable for storing data; and a controller suitable for performing a wear-leveling operation between source and target memory blocks selected from the memory blocks, The controller may select the source and target memory blocks based on an erase count list storing current erase count (EC) information of the memory blocks.
Abstract translation: 存储器系统包括：包括多个存储块并且适于存储数据的存储器件; 以及适于在从存储块选择的源和目标存储块之间执行磨损均衡操作的控制器。控制器可以基于存储存储器的当前擦除计数（EC）信息的擦除计数列表来选择源存储器块和目标存储器块 块。
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33.发明申请SEMICONDUCTOR DEVICE WITH SELF-ALIGNED AIR GAP AND METHOD FOR FABRICATING THE SAME 有权具有自对准空气隙的半导体器件及其制造方法公开(公告)号：US20140187037A1
公开(公告)日：2014-07-03
申请号：US13844915
申请日：2013-03-16
Applicant: SK HYNIX INC.
Inventor： Il-Cheol RHO , Jong-Min LEE
IPC: H01L29/92 , H01L21/764
CPC classification number: H01L21/7682 , H01L21/28008 , H01L21/764 , H01L21/76877 , H01L21/76886 , H01L27/10823 , H01L27/10855 , H01L29/92
Abstract: A method for fabricating a semiconductor device includes forming a plurality of semiconductor structures over a substrate, forming an interlayer dielectric layer over the semiconductor structures, etching the interlayer dielectric layer, and defining open parts between the semiconductor structures to expose a surface of the substrate, forming sacrificial spacers on sidewalls of the open parts, forming conductive layer patterns in the open parts, and causing the conductive layer patterns and the sacrificial spacers to reach each other, and defining air gaps on the sidewalls of the open parts.
Abstract translation: 一种制造半导体器件的方法包括在衬底上形成多个半导体结构，在半导体结构上形成层间电介质层，蚀刻层间电介质层，并且在半导体结构之间限定开放部分以露出衬底的表面， 在开放部分的侧壁上形成牺牲隔离物，在开放部分中形成导电层图案，并使导电层图案和牺牲间隔物彼此到达，并且在开口部分的侧壁上限定气隙。
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34.发明申请公开(公告)号：US20210397556A1
公开(公告)日：2021-12-23
申请号：US17464088
申请日：2021-09-01
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
IPC: G06F12/0804 , G06F12/06
Abstract: A method for performing a sudden power-off recovery operation of a controller controlling a memory device, the method includes: obtaining open block information for open blocks of the memory device and read counts for the open blocks; updating each of the read counts by adding a set value to each of the read counts; storing the updated read counts in the memory device; sequentially reading pages in each of the open blocks without updating the read counts for the open blocks, based on the open block information, to detect a boundary page after the storing of the updated read counts in the memory device; and controlling the memory device to program dummy data in the detected boundary page.
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公开(公告)号：US20210382660A1
公开(公告)日：2021-12-09
申请号：US17408074
申请日：2021-08-20
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
IPC: G06F3/06
Abstract: A method for operating a memory system includes performing a block access task on a first block in a memory device, the memory device having a plurality of blocks, generating log information when a power supply voltage becomes lower than a given level, the log information including a check point and block information, the check point indicating the block access task, the block information indicating a second block, and performing the block access task on the second block indicated in the block information of the log information when the power supply voltage becomes equal to or greater than the given level.
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Patent Agency Ranking
公开(公告)号：US20210182148A1
公开(公告)日：2021-06-17
申请号：US17152113
申请日：2021-01-19
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system may include: a nonvolatile memory device including a plurality of memory blocks, each of which includes a plurality of pages, and among which a subset of memory blocks are managed as a system area and remaining memory blocks are managed as a normal area; and a controller may store system data, used to control the nonvolatile memory device, in the system area, and storing boot data, used in a host and normal data updated in a control operation for the nonvolatile memory device, in the normal area, the controller may perform a checkpoint operation each time storage of N number of boot data among the boot data is completed, and may perform the checkpoint operation each time the control operation for the nonvolatile memory device is completed, ‘N’ being a natural number.
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公开(公告)号：US20210098070A1
公开(公告)日：2021-04-01
申请号：US16794804
申请日：2020-02-19
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a memory device including a plurality of memory blocks, each block having a plurality of pages to store data; and a controller suitable for detecting a number of error bits from data stored in the plurality of pages; summing the number of error bits; generating a bad word line list based on the sum of the error bits; and performing a test read operation on the plurality of pages based on the bad word line list.
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38.发明申请公开(公告)号：US20200333958A1
公开(公告)日：2020-10-22
申请号：US16679094
申请日：2019-11-08
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a memory device including a plurality of memory blocks capable of storing data, and a controller configured to determine an attribute of data stored in a memory block during an operating period. A duration of the operating period is changeable based on a parameter regarding the plurality of memory blocks. The duration of the operating period is adjusted in order to increase the accuracy of a determination of a usage pattern regarding the memory device.
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39.发明申请公开(公告)号：US20200310896A1
公开(公告)日：2020-10-01
申请号：US16715817
申请日：2019-12-16
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A memory system includes a memory device including a plurality of memory blocks, each including a plurality of memory cells coupled to a plurality of word lines, and a controller configured to determine an operation status regarding a selected memory block among the plurality of memory blocks by performing read test operations to the selected memory block in stages. During the read test operations, the controller adjusts the numbers of word lines selected in each of the stages, based on an error.
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公开(公告)号：US20200310873A1
公开(公告)日：2020-10-01
申请号：US16773791
申请日：2020-01-27
Applicant: SK hynix Inc.
Inventor： Jong-Min LEE
Abstract: A controller for controlling a memory device, the controller includes a plurality of sub operation blocks suitable for performing sub operations of a request in a pipelining scheme; a plurality of queues respectively corresponding to the plurality of sub operation blocks and suitable for queuing a plurality of requests that are associated with the sub operations; and a pipeline manager suitable for selectively enabling each of the plurality of queues based on available power.
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