公开(公告)号：US20190244924A1

公开(公告)日：2019-08-08

申请号：US15891889

申请日：2018-02-08

Applicant: Sensors Unlimited, Inc.

Inventor： Wei Zhang ,  Wei Huang ,  Joshua Lund ,  Namwoong Paik

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/13 ,  H01L27/146

CPC classification number: H01L24/14 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/13 ,  H01L24/11 ,  H01L24/81 ,  H01L27/14643

Abstract: A method of forming bump structures for interconnecting components includes applying an insulating layer over a device substrate, coating the insulating layer with a dielectric material layer, forming a pattern with photolithography on the dielectric material layer, etching the dielectric material layer to transfer the pattern to the insulating layer, etching the insulating layer to form pockets in the insulating layer following the pattern, applying photolithography to and etching the dielectric material layer to reduce overhang of the dielectric material layer relative to the insulating layer, removing material from top and side walls of the pockets in the insulating layer, and depositing electrically conductive bump material in the pattern so a respective bump is formed in each pocket.

公开(公告)号：US10222258B2

公开(公告)日：2019-03-05

申请号：US15255514

申请日：2016-09-02

Applicant: Sensors Unlimited, Inc.

Inventor： Joshua Lund

IPC: G01J1/44 ,  G01S7/48 ,  G01S7/486

Abstract: An imaging and pulse detection pixel and an array of imaging and pulse detection pixels are provided. Each imaging and pulse detection pixel includes an optical detection device connected directly to a first and second transistor only, a pulse detection circuit that operates on the signal read out from the optical detection device and outputs a pulse detection output signal suitable for detection of pulses, and an imaging circuit that operates on a signal read out from the optical detection device and outputs an image output signal suitable for generation of an image. A terminal of the optical detection device is directly connected to only a gate terminal of the first transistor and a non-gate terminal of the second transistor.

公开(公告)号：US20180234648A1

公开(公告)日：2018-08-16

申请号：US15431179

申请日：2017-02-13

Applicant: Sensors Unlimited, Inc.

Inventor： John Liobe ,  Joshua Lund

IPC: H04N5/359 ,  G06T5/00 ,  G06T5/20 ,  G06T5/50 ,  H04N5/378 ,  H04N5/232

CPC classification number: H04N5/3597 ,  H04N5/217

Abstract: A method of correcting lag in an imaging pixel includes receiving a current frame pixel value and determining a current filter coefficient using the current frame pixel value. A pixel output is determined from a product of the current frame pixel value and current frame filter coefficient. The product of a first prior frame pixel value and corresponding first prior frame filter coefficient is added to the pixel output to generate a corrected pixel output to more closely indicates incident illumination on the imaging pixel during an integration period from which the current frame pixel value was obtained.

公开(公告)号：US20180077365A1

公开(公告)日：2018-03-15

申请号：US15266134

申请日：2016-09-15

Applicant: Sensors Unlimited, Inc.

Inventor： Joshua Lund

IPC: H04N5/347 ,  H04N5/378 ,  H04N5/33

CPC classification number: H04N5/347 ,  H04N5/33 ,  H04N5/378

Abstract: An imaging system includes a readout integrated circuit (ROIC) is operatively connected to receive photocurrent from a plurality of photodetectors (e.g., from a plurality of photodetectors of a photodetector array (PDA)). An event detection circuit in each ROIC pixel readout circuit generates binary output data, wherein the ROIC compresses the binary output data with a logical summary binning of N×M pixel binary outputs into a single summary output bit. The ROIC can be configured to receive image data from the photodetectors to form an image at a first frame rate, and to receive the binned binary data from the photodetectors at a second frame rate higher than the first frame rate.

公开(公告)号：US20180069042A1

公开(公告)日：2018-03-08

申请号：US15259479

申请日：2016-09-08

Applicant: Sensors Unlimited, Inc.

Inventor： Joshua Lund

IPC: H01L27/146 ,  H04N5/369 ,  G06T1/00 ,  H04N1/32

CPC classification number: H01L27/14605 ,  H04N1/32267 ,  H04N5/3696

Abstract: An imaging sensor includes an imaging array with a plurality of pixels. A sub-set of the pixels are marker pixels configured to each provide a constant respective output value to embed an orientation and alignment marker in images produced with the imaging array. The marker pixels can be sparsely distributed across the imaging array.

公开(公告)号：US09825189B2

公开(公告)日：2017-11-21

申请号：US14684021

申请日：2015-04-10

Applicant: Sensors Unlimited, Inc.

Inventor： Joshua Lund

IPC: H01J43/00 ,  H01L31/02 ,  H04N5/355 ,  H04N5/3745

CPC classification number: H01L31/02016 ,  H04N5/35518 ,  H04N5/35527 ,  H04N5/3745

Abstract: A photosensitive pixel with gain stage is disclosed. The photosensitive pixel with gain stage may receive an input light stimulus and output a corresponding output voltage in response to the input light stimulus. The output voltage may correspond linearly to the magnitude of the input light stimulus over a linear operating region and logarithmically to the magnitude of the input light stimulus over a logarithmic operating region. In this manner, the photosensitive pixel with gain stage may be both sensitive to input light stimuli over the linear operating region and may exhibit dynamic range enabling non-saturated response to input light stimuli over the logarithmic operating region.

公开(公告)号：US09769400B2

公开(公告)日：2017-09-19

申请号：US14997184

申请日：2016-01-15

Applicant: Sensors Unlimited, Inc.

Inventor： Minlong Lin ,  Joshua Lund

IPC: H04N5/357 ,  H04N5/378

CPC classification number: H04N5/357 ,  H04N5/30 ,  H04N5/378

Abstract: An imaging pixel is provided. The imaging pixel includes a photodetector that outputs charge signals in response to incident light and laser pulses and a high-frequency path. A detector biasing circuit is further provided that biases high-frequency signals of the charge signals that are associated with the laser pulses to follow the high frequency path. The detector biasing circuit effectively filters low-frequency signal components of the charge signals from following the high-frequency path.

公开(公告)号：US20170207262A1

公开(公告)日：2017-07-20

申请号：US14997171

申请日：2016-01-15

Applicant: Sensors Unlimited, Inc.

Inventor： Minlong Lin ,  Joshua Lund

IPC: H01L27/146

CPC classification number: H01L27/14612 ,  H01L27/14643

Abstract: An imaging pixel including a control device to control flow of a charge signal from a photodetector. The control device has a variable impedance that varies in response to frequency of an input signal, the control device being biased to permit signals to flow through the control device dependent on the frequency of signals being output by the photodetector. The imaging pixel further includes a low-frequency signal path that receives a flow of signals that flow through the control device, and a high-frequency signal path independent of the low-pass filter and the control device, the high-frequency signal path receiving high-frequency signals included in the charge signal.

公开(公告)号：US09497402B2

公开(公告)日：2016-11-15

申请号：US14673455

申请日：2015-03-30

Applicant: Sensors Unlimited, Inc.

Inventor： Minlong Lin ,  Joshua Lund

IPC: H01L31/00 ,  H04N5/3745 ,  H04N5/378 ,  H04N5/33

CPC classification number: H04N5/3745 ,  H04N5/33 ,  H04N5/355 ,  H04N5/378

Abstract: A circuit having a buffered direct injection (BDI) module is provided for image lag mitigation. The BDI module includes an optical detector coupled to a buffer. The buffer has a pixel amplifier which includes no more than two transistors. The BDI module includes a first current mirror coupled to the BDI module. The first current mirror generates a modulating current based on the output of the optical detector. The BDI module further includes a second current mirror coupled to the first current mirror. The second current mirror is configured to generate either an amplified or attenuated photocurrent operable to optimize an imaging time and scene brightness of the optical detector. The BDI module further includes a reset circuit, coupled to the second current mirror, and being configured to reset an integration capacitor which integrates an image signal based on the output of the optical detector.

Abstract translation: 具有缓冲直接注入（BDI）模块的电路被提供用于图像滞后缓解。 BDI模块包括耦合到缓冲器的光学检测器。 缓冲器具有包括不超过两个晶体管的像素放大器。 BDI模块包括耦合到BDI模块的第一电流镜。 第一电流镜根据光检测器的输出产生调制电流。 BDI模块还包​​括耦合到第一电流镜的第二电流镜。 第二电流镜被配置为产生放大或衰减的光电流，其可操作以优化光学检测器的成像时间和场景亮度。 BDI模块还包​​括耦合到第二电流镜的复位电路，并且被配置为复位基于光学检测器的输出对图像信号进行积分的积分电容器。

公开(公告)号：US09496299B1

公开(公告)日：2016-11-15

申请号：US14702164

申请日：2015-05-01

Applicant: Sensors Unlimited, Inc.

Inventor： Joshua Lund

IPC: H01L27/146

CPC classification number: H01L27/14609 ,  H01L27/14603 ,  H04N5/3745 ,  H04N5/37452

Abstract: An imager is provided that includes an integrated circuit. The integrated circuit includes at least one metal layer, a signal line extending in a first direction, and a pixel cell. The pixel cell includes imaging pixels and a metal interconnect. The imaging pixels include first, second, third, and fourth imaging pixels, arranged in two rows and two columns, each imaging pixel having a metal-insulator-metal (MiM) capacitor disposed on the at least one metal layer, the first and second imaging pixels being traversed by the signal line to receive signals from the signal line. The metal interconnect extends in a second direction different than the first direction and is coupled to the signal line and the third imaging pixel to transmit the signals to the third imaging pixel. The third imaging pixel is adjacent to the first imaging pixel and is disposed in a different column or row than the second imaging pixel.

Abstract translation: 提供了一种包括集成电路的成像器。 集成电路包括至少一个金属层，在第一方向上延伸的信号线和像素单元。 像素单元包括成像像素和金属互连。 成像像素包括排列成两行和两列的第一，第二，第三和第四成像像素，每个成像像素具有设置在至少一个金属层上的金属 - 绝缘体 - 金属（MiM）电容器，第一和第二 成像像素由信号线穿过以从信号线接收信号。 金属互连沿与第一方向不同的第二方向延伸，并且耦合到信号线和第三成像像素，以将信号传输到第三成像像素。 第三成像像素与第一成像像素相邻并且被布置在与第二成像像素不同的列或行中。