公开(公告)号：US20200229296A1

公开(公告)日：2020-07-16

申请号：US16833744

申请日：2020-03-30

Applicant: TACTOTEK OY

Inventor： Antti KERÄNEN ,  Tomi SIMULA ,  Mikko HEIKKINEN ,  Jarmo SÄÄSKI ,  Pasi RAAPPANA ,  Minna PIRKONEN

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/28 ,  H05K5/06

Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.

公开(公告)号：US20200229295A1

公开(公告)日：2020-07-16

申请号：US16245643

申请日：2019-01-11

Applicant: TACTOTEK OY

Inventor： Antti KERÄNEN ,  Tomi SIMULA ,  Mikko HEIKKINEN ,  Jarmo SÄÄSKI ,  Pasi RAAPPANA ,  Minna PIRKONEN

IPC: H05K1/02 ,  H05K1/18 ,  H05K5/06 ,  H05K3/28

Abstract: An electrical node includes a substrate for accommodating a functional element. The substrate includes a first side and an opposite second side, and hosting a number of connecting elements. The functional element includes an electronic component and conductive traces. The electrical node also includes a first material layer defining a protective covering. The first material layer defining at least a portion of the exterior surface of the nod arranged to reduce at least thermal expansion and/or mechanical deformation related stresses between one or more elements included in the node, adjacent the node and/or at least at a proximity thereto.

公开(公告)号：US20190069408A1

公开(公告)日：2019-02-28

申请号：US15687095

申请日：2017-08-25

Applicant: TactoTek Oy

Inventor： Antti KERANEN ,  Ronald Haag ,  Mikko HEIKKINEN

IPC: H05K1/18 ,  H05K1/02

Abstract: Integrated multilayer structure (100, 200, 300, 400, 500, 600, 700) comprising a first substrate film (102) having a first side (102A), said first substrate film comprising electrically substantially insulating material, said first substrate film preferably being formable and optionally thermoplastic, a plastic layer (112) molded onto said first side of the first substrate film so as to at least partially cover it, and circuitry (104, 106, 204, 205), optionally comprising an electronic, electromechanical and/or electro-optical component, provided on the second side of the first substrate film, said circuitry being functionally connected to the first side of the first substrate film.

公开(公告)号：US20190069403A1

公开(公告)日：2019-02-28

申请号：US15687157

申请日：2017-08-25

Applicant: TactoTek Oy

Inventor： Tero HEIKKINEN ,  Antti KERANEN ,  Mikko HEIKKINEN ,  Jarmo SAASKI

IPC: H05K1/03 ,  H05K1/18 ,  H05K1/02 ,  H05K3/28 ,  H05K3/46 ,  F21V3/00 ,  F21V8/00

Abstract: Integrated multilayer structure (100, 400) for hosting electronics, comprising a first substrate (102) comprising organic, electrically substantially insulating natural material including and exhibiting a related naturally grown or natural textile based surface texture, said first substrate having a first side (102A) facing a predefined front side of the structure, said first side of the first substrate being optionally configured to face a user and/or use environment of the structure or of its host device, and an opposite second side (102B), a plastic layer (112), optionally comprising thermoplastic or thermoset plastics, molded onto said second side of the first substrate so as to at least partially cover it, and circuitry (104, 104B) provided on the second side of the first substrate, said circuitry being at least partially embedded in the molded material of the plastic layer. Related method of manufacture is presented.