公开(公告)号：US20220208755A1

公开(公告)日：2022-06-30

申请号：US17137784

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Naveen Tipirneni ,  Maik Peter Kaufmann ,  Michael Lueders ,  Jungwoo Joh

IPC: H01L27/06 ,  H01L49/02 ,  H01L29/20 ,  H01L29/778 ,  H01L21/8252 ,  H01L29/66

Abstract: The present invention provides a capacitor having a first structure made of a metal layer and a second structure made of the same metal layer and a dielectric layer between the first and the second metal structure, wherein the dielectric layer has a relative permittivity greater than 4, in particular greater than 6. It also provides a monolithically integrated circuit including such a capacitor and optionally other components. A method of manufacturing such a capacitor is also provided.

公开(公告)号：US20210265992A1

公开(公告)日：2021-08-26

申请号：US17314523

申请日：2021-05-07

Applicant: Texas Instruments Incorporated

Inventor： Michael Lueders ,  Johan Strydom ,  Cetin Kaya ,  Maik Peter Kaufmann

IPC: H03K17/22 ,  H02M1/08 ,  H02M1/36 ,  H02M3/335

Abstract: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third control terminal, a fifth current terminal and a sixth current terminal, the fifth current terminal coupled to the first control terminal and the third control terminal is adapted to be coupled to the control signal.

公开(公告)号：US20210258045A1

公开(公告)日：2021-08-19

申请号：US17167753

申请日：2021-02-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Lueders ,  Giacomo Calabrese ,  Nicola Bertoni

IPC: H04B5/00 ,  H05K1/16 ,  H05K3/46

Abstract: A circuit support structure includes a first metal layer, a second metal layer, isolation material containing the first and second metal layers, an isolation circuit, a first plurality of contact pads, and a second plurality of contact pads. The isolation circuit includes a first circuit element in the first metal layer and a second circuit element in the second metal layer and electrically isolated from the first circuit element by the isolation material. The first plurality of contact pads is adapted to be coupled to a first integrated circuit on the circuit support structure and includes a first contact pad electrically coupled to the first circuit element. The second plurality of contact pads is adapted to be coupled to a second integrated circuit on the circuit support structure and includes a second contact pad electrically coupled to the second circuit element.

公开(公告)号：US20210044286A1

公开(公告)日：2021-02-11

申请号：US16942390

申请日：2020-07-29

Applicant: Texas Instruments Incorporated

Inventor： Maik Peter Kaufmann ,  Michael Lueders ,  Cetin Kaya

IPC: H03K17/082 ,  H03K19/0185

Abstract: Gate drivers and auto-zero comparators are disclosed. An example integrated circuit includes a transistor comprising a gate terminal and a current terminal, a gallium nitride (GaN) gate driver coupled to the gate terminal, the GaN gate driver configured to adjust operation of the transistor, and an enhancement mode GaN comparator coupled to at least one of the transistor the GaN gate driver, the enhancement mode GaN comparator configured to compare a voltage to a reference voltage, the voltage based on current from the current terminal, the GaN gate driver configured to adjust the operation of the transistor based on the comparison.

公开(公告)号：US20200153343A1

公开(公告)日：2020-05-14

申请号：US16741856

申请日：2020-01-14

Applicant: Texas Instruments Incorporated

Inventor： Cetin Kaya ,  Paul Brohlin ,  Michael Lueders ,  Johan Strydom

IPC: H02M3/337 ,  H02M3/335

Abstract: Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.

公开(公告)号：US20250120157A1

公开(公告)日：2025-04-10

申请号：US18610150

申请日：2024-03-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jonas Höhenberger ,  Ujwal Radhakrishna ,  Michael Lueders ,  Meng-Chia Lee ,  Chang Soo Suh ,  Zhikai Tang ,  Jungwoo Joh ,  Timothy Bryan Merkin ,  Stefan Herzer ,  Bernhard Ziegltrum ,  Helmut Rinck ,  Michael Hans Enzelberger-Heim ,  Ercuement Hasanoglu

IPC: H01L29/40 ,  H01L21/027 ,  H01L21/311 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure generally relates to a semiconductor device having a slanted field plate. In an example, a semiconductor device includes a semiconductor substrate, a gate, a drain contact, a source contact, and a field plate. The gate is on a surface of the semiconductor substrate. The drain contact and a source contact are on the semiconductor substrate. The field plate is over the surface of the semiconductor substrate and extends from one side of the gate towards the drain contact. The field plate includes multiple field plate portions. Each of the multiple field plate portions has a uniform respective slope with respect to the surface, and the multiple field plate portions have different slopes.

公开(公告)号：US20250047271A1

公开(公告)日：2025-02-06

申请号：US18924210

申请日：2024-10-23

Applicant: Texas Instruments Incorporated

Inventor： Gaetano Maria Walter Petrina ,  Michael Lueders ,  Nicola Rasera

IPC: H03K5/1534 ,  H02M1/08 ,  H02M1/38 ,  H03K5/00 ,  H03K5/13

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for cross-conduction detection. An example apparatus includes a cross detector circuit including a first transistor and a second transistor, the first transistor coupled to a load, a third transistor coupled to a first controlled delay circuit and the first transistor, a fourth transistor coupled to a second controlled delay circuit and to the third transistor at a phase node, and a control circuit coupled to the first controlled delay circuit, the second controlled delay circuit, and the load.

公开(公告)号：US20240313660A1

公开(公告)日：2024-09-19

申请号：US18141245

申请日：2023-04-28

Applicant: Texas Instruments Incorporated

Inventor： Laszlo Balogh ,  Michael Lueders ,  Stefan Herzer ,  Maik Peter Kaufmann

IPC: H02M3/335 ,  H02M1/00 ,  H02M1/36

CPC classification number: H02M3/33576 ,  H02M1/0009 ,  H02M1/0025 ,  H02M1/36

Abstract: A self-biasing circuit for power converters is disclosed. In an example, an apparatus includes a first transistor coupled between an inductor terminal and a ground terminal, and a second transistor coupled between the inductor terminal and a bias terminal. The first transistor has a first control terminal, and the second transistor has a second control terminal. In an example, the first and second transistors are configured to split a current at the inductor terminal. The apparatus further includes a controller having first and second control outputs, where the first control output is coupled to the first control terminal, the second control output is coupled to the second control terminal.

公开(公告)号：US20220399328A1

公开(公告)日：2022-12-15

申请号：US17548426

申请日：2021-12-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Maik Peter Kaufmann ,  Michael Lueders ,  CHANG SOO SUH

IPC: H01L27/06 ,  H01L29/45 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L49/02 ,  H01L21/8252 ,  H01L29/66

Abstract: A depletion-mode current source having a saturation current of sufficient accuracy for use as a pre-charge circuit in a start-up circuit of an AC-to-DC power converter is fabricated using an enhancement-mode-only process. The depletion-mode current source can be fabricated on the same integrated circuit (IC) as a gallium nitride field-effect transistor (FET) and resistive and capacitive components used in the start-up circuit, without affecting the enhancement-mode-only fabrication process by requiring additional masks or materials, as would be required to fabricate a depletion-mode FET on the same IC as an enhancement-mode FET. The current source includes a resistive patterned two-dimensional electron gas (2DEG) or two-dimensional hole gas (2DHG) channel coupled between two terminals and one or more metal field plates extending from one of the terminals and overlying the patterned area of the channel, the field plates being separated from the channel and from each other by dielectric layers.

公开(公告)号：US20220270960A1

公开(公告)日：2022-08-25

申请号：US17363200

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Ernst Georg Muellner ,  Michael Lueders

IPC: H01L23/498 ,  H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: In described examples, a device includes an interconnect substrate that has an aperture through the interconnect substrate. An integrated circuit (IC) die that has an on-chip element is mounted on the interconnect substrate with the on-chip element aligned with and facing the aperture. The IC die is over-molded with mold compound only on one side of the interconnect substrate so that the aperture remains free of mold compound to allow the on-chip element to have access to the environment.