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公开(公告)号:US20240248264A1
公开(公告)日:2024-07-25
申请号:US18623035
申请日:2024-04-01
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Pu-Ju Lin , Kai-Ming Yang , Chen-Hao Lin , Cheng-Ta Ko , Tzyy-Jang Tseng
IPC: G02B6/42 , G02B6/12 , H01L23/498 , H01L25/065
CPC classification number: G02B6/4206 , G02B6/12004 , G02B6/4293 , H01L23/49816 , H01L25/0652
Abstract: Disclosed is a package structure including a circuit board, a co-packaged optics (CPO) substrate, an application specific integrated circuit (ASIC) assembly, a glass interposer, an electronic integrated circuit (EIC) assembly, a photonic integrated circuit (PIC) assembly, and an optical fiber assembly. The CPO substrate is configured on the circuit board, and the ASIC assembly is configured on the CPO substrate. The glass interposer is configured on the CPO substrate and includes an upper surface, a lower surface, a cavity, and at least one through glass via (TGV). The EIC assembly is configured on the upper surface of the glass interposer and electrically connected to the glass interposer. The PIC assembly is configured in the cavity of the glass interposer and electrically connected to the glass interposer. The optical fiber assembly is configured on the lower surface of the glass interposer and optically connected to the PIC assembly.
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公开(公告)号:US20240234371A1
公开(公告)日:2024-07-11
申请号:US18171672
申请日:2023-02-21
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Tzyy-Jang Tseng
IPC: H01L25/065 , H01L23/00 , H01L23/538 , H01L25/00
CPC classification number: H01L25/0655 , H01L23/538 , H01L24/05 , H01L24/08 , H01L24/11 , H01L24/14 , H01L24/16 , H01L24/80 , H01L24/81 , H01L24/94 , H01L25/50 , H01L2224/05647 , H01L2224/08225 , H01L2224/1132 , H01L2224/1413 , H01L2224/16227 , H01L2224/80357 , H01L2224/80379 , H01L2224/80895 , H01L2224/80896 , H01L2224/81191 , H01L2224/81192 , H01L2224/94 , H01L2924/05442
Abstract: A chip package structure includes a package carrier, a plurality of chips, a bridge and a plurality of solder balls or C4 bumps. The package carrier includes a plurality of carrier pads. The chips are arranged side by side on the package carrier. Each of the chips includes a plurality of first pads and a plurality of second pads. The bridge is located between the chips and the package carrier and includes a plurality of bridge pads. Each of the first pads is hybrid bonded with each of the bridge pads to form a hybrid bonding pad, so that the chips are electrically connected to each other through the bridge. The solder balls are located between the package carrier and the chips. The second pads of each of the chips are electrically connected to the carrier pads of the package carrier through the solder balls.
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公开(公告)号:US20230400649A1
公开(公告)日:2023-12-14
申请号:US17835990
申请日:2022-06-09
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Tzyy-Jang Tseng
IPC: G02B6/42
CPC classification number: G02B6/4274 , G02B6/4295 , H01S5/423 , G02B6/4249 , G02B6/4271
Abstract: A package structure includes a circuit board, a package substrate, a fine metal L/S RDL-substrate, an electronic assembly, a photonic assembly, a heat dissipation assembly, and an optical fiber assembly. The package substrate is disposed on and electrically connected to the circuit board. The fine metal L/S RDL-substrate is disposed on and electrically connected to the package substrate. The electronic assembly includes an application specific integrated circuit (ASIC) assembly, an electronic integrated circuit (EIC) assembly, and a photonic integrated circuit (PIC) assembly which are respectively disposed on the fine metal L/S RDL-substrate and electrically connected to the package substrate by the fine metal L/S RDL-substrate. The heat dissipation assembly is disposed on the electronic assembly. The optical fiber assembly is disposed on the package substrate and electrically connected to the package substrate and the PIC assembly. A packaging method of the VCSEL array chip is presented.
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公开(公告)号:US11665832B2
公开(公告)日:2023-05-30
申请号:US17234805
申请日:2021-04-20
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Cheng-Ta Ko , Pu-Ju Lin , Chi-Hai Kuo , Kai-Ming Yang , Chia-Yu Peng , Shao-Chien Lee , Tzyy-Jang Tseng
IPC: H05K1/00 , H05K1/02 , H05K1/03 , H05K1/09 , H05K1/11 , H05K1/14 , H05K1/16 , H05K1/18 , H05K3/20 , H05K3/36 , H05K3/38 , H05K3/40 , H05K3/46 , H05K3/02
CPC classification number: H05K3/46 , H05K3/022 , H05K3/386 , H05K3/4038
Abstract: A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.
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公开(公告)号:US20230067112A1
公开(公告)日:2023-03-02
申请号:US17983396
申请日:2022-11-09
Applicant: Unimicron Technology Corp.
Inventor: Ra-Min Tain , John Hon-Shing Lau , Pu-Ju Lin , Wei-Ci Ye , Chi-Hai Kuo , Cheng-Ta Ko , Tzyy-Jang Tseng
Abstract: A vapor chamber structure includes a thermally conductive shell, a capillary structure layer, and a working fluid. The thermally conductive shell includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion and the second thermally conductive portion are a thermally conductive plate that is integrally formed, and the thermally conductive shell is formed by folding the thermally conductive plate in half and then sealing the thermally conductive plate. The first thermally conductive portion has at least one first cavity, the second thermally conductive portion has at least one second cavity. At least one sealed chamber is defined between the thermally conductive plate, the first cavity and the second cavity. A pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer covers an inner wall of the sealed chamber. The working fluid is filled in the sealed chamber.
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公开(公告)号:US11540396B2
公开(公告)日:2022-12-27
申请号:US17191559
申请日:2021-03-03
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang Tseng , Shao-Chien Lee , John Hon-Shing Lau , Chen-Hua Cheng , Ra-Min Tain
IPC: H05K1/00 , H05K1/02 , H05K1/11 , H05K1/16 , H05K3/00 , H05K3/28 , H05K3/38 , H05K3/46 , H01L23/12 , H01L23/13 , H01L23/48 , H01L23/52 , H01L23/552 , H05K3/40 , H05K1/03
Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.
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公开(公告)号:US20220256717A1
公开(公告)日:2022-08-11
申请号:US17234805
申请日:2021-04-20
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Cheng-Ta Ko , Pu-Ju Lin , Chi-Hai Kuo , Kai-Ming Yang , Chia-Yu Peng , Shao-Chien Lee , Tzyy-Jang Tseng
Abstract: A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.
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公开(公告)号:US20210247147A1
公开(公告)日:2021-08-12
申请号:US17168200
申请日:2021-02-05
Applicant: Unimicron Technology Corp.
Inventor: Ra-Min Tain , John Hon-Shing Lau , Pu-Ju Lin , Wei-Ci Ye , Chi-Hai Kuo , Cheng-Ta Ko , Tzyy-Jang Tseng
Abstract: A vapor chamber structure including a thermally conductive shell, a capillary structure layer, and a working fluid is provided. The thermally conductive shell includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion has at least one first cavity. The second thermally conductive portion and the first cavity define at least one sealed chamber, and a pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer covers an inner wall of the sealed chamber. The working fluid is filled in the sealed chamber.
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