公开(公告)号：US11540396B2

公开(公告)日：2022-12-27

申请号：US17191559

申请日：2021-03-03

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Shao-Chien Lee ,  John Hon-Shing Lau ,  Chen-Hua Cheng ,  Ra-Min Tain

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/11 ,  H05K1/16 ,  H05K3/00 ,  H05K3/28 ,  H05K3/38 ,  H05K3/46 ,  H01L23/12 ,  H01L23/13 ,  H01L23/48 ,  H01L23/52 ,  H01L23/552 ,  H05K3/40 ,  H05K1/03

Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

公开(公告)号：US20220071000A1

公开(公告)日：2022-03-03

申请号：US17149664

申请日：2021-01-14

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Shao-Chien Lee ,  John Hon-Shing Lau ,  Chen-Hua Cheng ,  Ra-Min Tain

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H05K3/02 ,  H05K3/00

Abstract: The disclosure provides a circuit board structure including at least two sub-circuit boards and at least one connector. Each of the sub-circuit boards includes a plurality of carrier units. The connector is connected between the sub-circuit boards, and a plurality of stress-relaxation gaps are defined between the sub-circuit boards.

公开(公告)号：US20190296102A1

公开(公告)日：2019-09-26

申请号：US16145130

申请日：2018-09-27

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  Chen-Hua Cheng ,  Chin-Sheng Wang ,  Chung-Chi Huang

IPC: H01L49/02 ,  H01L23/522

Abstract: An embedded component structure including a circuit board, an electronic component, a dielectric layer and a connection circuit layer and a manufacturing method thereof is provided. The circuit board has a through hole and includes a core layer, a first circuit layer, and a second circuit layer. The first circuit layer and the second circuit layer are disposed on the core layer. The through hole penetrates the first circuit layer and the core layer. The electronic component including a plurality of connection pads is disposed within the through hole where the dielectric layer is filled in. The connection circuit layer covers and contacts a first electrical connection surface of the first circuit layer and at least one of a second electrical connection surface of each of the connection pads.

公开(公告)号：US20220071015A1

公开(公告)日：2022-03-03

申请号：US17191559

申请日：2021-03-03

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Shao-Chien Lee ,  John Hon-Shing Lau ,  Chen-Hua Cheng ,  Ra-Min Tain

IPC: H05K3/00 ,  H05K3/46 ,  H05K3/40

Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

公开(公告)号：US11145610B2

公开(公告)日：2021-10-12

申请号：US16729488

申请日：2019-12-30

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US11562972B2

公开(公告)日：2023-01-24

申请号：US17463559

申请日：2021-09-01

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L21/56 ,  H01L23/66 ,  H01L23/31 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US20210398925A1

公开(公告)日：2021-12-23

申请号：US17463559

申请日：2021-09-01

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

公开(公告)号：US20210202407A1

公开(公告)日：2021-07-01

申请号：US16729488

申请日：2019-12-30

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Yu-Chi Shen ,  Tzyy-Jang Tseng ,  Chen-Hua Cheng ,  Pei-Wei Wang

IPC: H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01Q1/22

Abstract: A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.