公开(公告)号：US20120112327A1

公开(公告)日：2012-05-10

申请号：US13349919

申请日：2012-01-13

Applicant: Reza A. Pagaila ,  Yaojian Lin

Inventor： Reza A. Pagaila ,  Yaojian Lin

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/19 ,  H01L24/97 ,  H01L25/03 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/20 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies extending from the plate. The bodies define a plurality of cavities in the shielding frame. A penetrable material is deposited in the cavities of the shielding frame. The shielding frame is mounted over the semiconductor die such that the penetrable material encapsulates the die. The carrier is removed. An interconnect structure is formed over the die, shielding frame, and penetrable material. The bodies of the shielding frame are electrically connected through the interconnect structure to a ground point. The shielding frame is singulated through the bodies or through the plate and penetrable material to separate the die. TIM is formed over the die adjacent to the plate of the shielding frame. A heat sink is mounted over the plate of the shielding frame.

公开(公告)号：US20120018904A1

公开(公告)日：2012-01-26

申请号：US13181290

申请日：2011-07-12

Applicant: Yaojian Lin ,  Xia Feng ,  Jianmin Fang ,  Kang Chen

Inventor： Yaojian Lin ,  Xia Feng ,  Jianmin Fang ,  Kang Chen

IPC: H01L29/40 ,  H01L21/283

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/525 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02317 ,  H01L2224/0235 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/00 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/381 ,  H05K2201/09854 ,  H01L2924/01014 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor die and first conductive layer formed over a surface of the semiconductor die. A first insulating layer is formed over the surface of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. An opening is formed in the second insulating layer over the first conductive layer. A second conductive layer is formed in the opening over the first conductive layer and second insulating layer. The second conductive layer has a width that is less than a width of the first conductive layer along a first axis. The second conductive layer has a width that is greater than a width of the first conductive layer along a second axis perpendicular to the first axis. A third insulating layer is formed over the second conductive layer and first insulating layer.

Abstract translation: 半导体器件具有形成在半导体管芯的表面上的半导体管芯和第一导电层。 在半导体管芯的表面上形成第一绝缘层。 在第一绝缘层和第一导电层上形成第二绝缘层。 在第一导电层上的第二绝缘层中形成开口。 在第一导电层和第二绝缘层上的开口中形成第二导电层。 第二导电层的宽度小于沿着第一轴线的第一导电层的宽度。 第二导电层的宽度大于沿着垂直于第一轴线的第二轴线的第一导电层的宽度。 在第二导电层和第一绝缘层上形成第三绝缘层。

公开(公告)号：US20120003830A1

公开(公告)日：2012-01-05

申请号：US13233402

申请日：2011-09-15

Applicant: Yaojian Lin ,  Haijing Cao ,  Qing Zhang

Inventor： Yaojian Lin ,  Haijing Cao ,  Qing Zhang

IPC: H01L21/768

CPC classification number: H01L23/3114 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/525 ,  H01L24/11 ,  H01L24/12 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05001 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/04941 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacture of an integrated circuit package system includes: providing an integrated circuit die having a contact pad; forming a protection cover over the contact pad; forming a passivation layer having a first opening over the protection cover with the first opening exposing the protection cover; developing a conductive layer over the passivation layer; forming a pad opening in the protection cover for exposing the contact pad having the conductive layer partially removed; and an interconnect directly on the contact pad and only adjacent to the protection cover and the passivation layer.

Abstract translation: 一种用于制造集成电路封装系统的方法，包括：提供具有接触焊盘的集成电路管芯; 在接触垫上形成保护盖; 形成钝化层，所述钝化层在所述保护盖上方具有第一开口，所述第一开口露出所述保护盖; 在钝化层上形成导电层; 在保护盖中形成焊盘开口，用于暴露具有部分去除的导电层的接触焊盘; 以及直接在接触焊盘上并且仅与保护盖和钝化层相邻的互连。

公开(公告)号：US20110316171A1

公开(公告)日：2011-12-29

申请号：US13207633

申请日：2011-08-11

Applicant: Il Kwon Shim ,  Yaojian Lin ,  Seng Guan Chow

Inventor： Il Kwon Shim ,  Yaojian Lin ,  Seng Guan Chow

IPC: H01L23/28 ,  H01L21/56

CPC classification number: H01L23/3128 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/50 ,  H01L23/528 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/18 ,  H01L24/19 ,  H01L24/96 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/18 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.

Abstract translation: 半导体器件具有形成在半导体晶片的有源表面上的保护层。 具有预先施加的保护层的半导体管芯从半导体晶片移动并安装在载体上。 载体上的半导体管芯和接触焊盘被封装。 载体被移除。 在预先施加的保护层和接触垫上形成第一绝缘层。 在第一绝缘层和预先施加的保护层中形成通孔以暴露半导体管芯上的互连部位。 在第一绝缘层上形成互连结构，与半导体管芯和接触焊盘上的互连部位电接触。 互连结构具有形成在第一绝缘层上的再分布层，形成在再分配层上的第二绝缘层和形成在与再分布层电接触的第二电介质上的凸块下金属化层。

公开(公告)号：US20110316156A1

公开(公告)日：2011-12-29

申请号：US12822488

申请日：2010-06-24

Applicant: Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC: H01L23/538 ,  H01L21/56 ,  H01L21/60

CPC classification number: H01L23/522 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/30 ,  H01L24/48 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13157 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15172 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a first semiconductor die with a sloped side surface. The first semiconductor die is mounted to a temporary carrier. An RDL extends from a back surface of the first semiconductor die along the sloped side surface of the first semiconductor die to the carrier. An encapsulant is deposited over the carrier and a portion of the RDL along the sloped side surface. The back surface of the first semiconductor die and a portion of the RDL is devoid of the encapsulant. The temporary carrier is removed. An interconnect structure is formed over the encapsulant and exposed active surface of the first semiconductor die. The RDL is electrically connected to the interconnect structure. A second semiconductor die is mounted over the back surface of the first semiconductor die. The second semiconductor die has bumps electrically connected to the RDL.

Abstract translation: 半导体器件具有具有倾斜侧表面的第一半导体管芯。 第一半导体管芯安装到临时载体上。 RDL从第一半导体管芯的后表面沿着第一半导体管芯的倾斜侧表面延伸到载体。 密封剂沉积在载体上，RDL的一部分沿着倾斜的侧表面沉积。 第一半导体管芯的背面和RDL的一部分没有密封剂。 移除临时载体。 在第一半导体管芯的密封剂和暴露的有源表面上形成互连结构。 RDL电连接到互连结构。 第二半导体管芯安装在第一半导体管芯的后表面上。 第二半导体管芯具有与RDL电连接的突起。

公开(公告)号：US20110298109A1

公开(公告)日：2011-12-08

申请号：US12792066

申请日：2010-06-02

Applicant: Reza A. Pagaila ,  Yaojian Lin

Inventor： Reza A. Pagaila ,  Yaojian Lin

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/19 ,  H01L24/97 ,  H01L25/03 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/20 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies extending from the plate. The bodies define a plurality of cavities in the shielding frame. A penetrable material is deposited in the cavities of the shielding frame. The shielding frame is mounted over the semiconductor die such that the penetrable material encapsulates the die. The carrier is removed. An interconnect structure is formed over the die, shielding frame, and penetrable material. The bodies of the shielding frame are electrically connected through the interconnect structure to a ground point. The shielding frame is singulated through the bodies or through the plate and penetrable material to separate the die. TIM is formed over the die adjacent to the plate of the shielding frame. A heat sink is mounted over the plate of the shielding frame.

Abstract translation: 半导体器件具有安装到临时载体上的多个半导体管芯。 预制屏蔽框架具有板和从板延伸的整体。 主体在屏蔽框架中限定多个空腔。 可穿透材料沉积在屏蔽框架的空腔中。 屏蔽框架安装在半导体管芯上，使得可穿透材料封装模具。 载体被移除。 在模具，屏蔽框架和可穿透材料上形成互连结构。 屏蔽框架的主体通过互连结构电连接到接地点。 屏蔽框架通过主体或通过板和可穿透材料分离，以分离模具。 TIM与屏蔽框架的板相邻形成在模具上。 散热器安装在屏蔽框架的板上。

公开(公告)号：US20110278717A1

公开(公告)日：2011-11-17

申请号：US12779781

申请日：2010-05-13

Applicant: Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC: H01L23/36 ,  H01L21/60 ,  H01L21/50 ,  H01L23/538

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3677 ,  H01L24/19 ,  H01L24/48 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/20 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the first semiconductor die. A penetrable adhesive layer is formed over a temporary carrier. The adhesive layer can include a plurality of slots. The semiconductor die is mounted to the carrier by embedding the bumps into the penetrable adhesive layer. The semiconductor die and interconnect structure can be separated by a gap. An encapsulant is deposited over the first semiconductor die. The bumps embedded into the penetrable adhesive layer reduce shifting of the first semiconductor die while depositing the encapsulant. The carrier is removed. An interconnect structure is formed over the semiconductor die. The interconnect structure is electrically connected to the bumps. A thermally conductive bump is formed over the semiconductor die, and a heat sink is mounted to the interconnect structure and thermally connected to the thermally conductive bump.

Abstract translation: 半导体器件具有形成在第一半导体管芯的表面上的多个凸点的半导体管芯。 在临时载体上形成可穿透的粘合剂层。 粘合剂层可以包括多个槽。 通过将凸块嵌入到可穿透的粘合剂层中，将半导体管芯安装到载体上。 半导体管芯和互连结构可以通过间隙分开。 密封剂沉积在第一半导体管芯上。 嵌入可渗透粘合剂层中的凸起减少了第一半导体管芯的移动，同时沉积密封剂。 载体被移除。 在半导体管芯上形成互连结构。 互连结构电连接到凸块。 导热凸块形成在半导体管芯上，并且散热器安装到互连结构并热连接到导热凸块。

公开(公告)号：US08048776B2

公开(公告)日：2011-11-01

申请号：US12036000

申请日：2008-02-22

Applicant: Byung Tai Do ,  Heap Hoe Kuan ,  Yaojian Lin ,  Rui Huang

Inventor： Byung Tai Do ,  Heap Hoe Kuan ,  Yaojian Lin ,  Rui Huang

IPC: H01L21/30

CPC classification number: H01L24/11 ,  H01L21/304 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1131 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014

Abstract: A semiconductor device is made by providing a semiconductor wafer having an active surface, forming an under bump metallization layer on the active surface of the semiconductor wafer, forming a first photosensitive layer on the active surface of the semiconductor wafer, exposing a selected portion of the first photosensitive layer over the under bump metallization layer to light, removing a portion of a backside of the semiconductor wafer, opposite to the active surface, prior to developing the exposed portion of the first photosensitive layer, developing the exposed portion of the first photosensitive layer after removing the portion of the backside of the semiconductor wafer, and depositing solder material over the under bump metallization layer to form solder bumps. The remaining portion of the first photosensitive layer is then removed. A second photosensitive layer or metal stencil can be formed over the first photosensitive layer.

Abstract translation: 通过提供具有活性表面的半导体晶片制造半导体器件，在半导体晶片的有源表面上形成凸起下金属化层，在半导体晶片的有源表面上形成第一感光层，将所选择的部分 在凸起下金属化层之上的第一感光层进行光照射，在显影第一感光层的暴露部分之前，移除与有源表面相对的半导体晶片的背面的一部分，将第一感光层的暴露部分 在去除半导体晶片的背面的部分之后，并且将焊料材料沉积在凸块下金属化层上以形成焊料凸块。 然后除去第一感光层的剩余部分。 可以在第一感光层上形成第二感光层或金属模版。

公开(公告)号：US20110254155A1

公开(公告)日：2011-10-20

申请号：US13170116

申请日：2011-06-27

Applicant: Yaojian Lin ,  Haijing Cao

Inventor： Yaojian Lin ,  Haijing Cao

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L21/6835 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/18 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68368 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/85005 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacturing a semiconductor device includes providing a wafer for supporting the semiconductor device. An insulation layer is disposed over a top surface of the wafer. The method includes forming a first interconnect structure over the top surface of the wafer with temperatures in excess of 200° C., forming a metal pillar over the wafer in electrical contact with the first interconnect structure, connecting a semiconductor component to the first interconnect structure, and forming encapsulant over the semiconductor component. The encapsulant is etched to expose a portion of the metal pillar. A buffer layer is optionally formed over the encapsulant. The method includes forming a second interconnect structure over the encapsulant in electrical contact with the metal pillar with temperatures below 200° C., and removing a portion of a backside of the wafer opposite the top surface of the wafer.

Abstract translation: 制造半导体器件的方法包括提供用于支撑半导体器件的晶片。 绝缘层设置在晶片的顶表面上。 该方法包括在超过200℃的温度下在晶片的顶表面上形成第一互连结构，在与第一互连结构电接触的晶片上形成金属柱，将半导体部件连接到第一互连结构 ，并在半导体部件上形成密封剂。 蚀刻密封剂以暴露金属柱的一部分。 任选地在密封剂上形成缓冲层。 该方法包括在温度低于200℃的金属柱上与密封剂形成第二互连结构，并且移除与晶片顶表面相对的晶片背面的一部分。

公开(公告)号：US08039303B2

公开(公告)日：2011-10-18

申请号：US12481404

申请日：2009-06-09

Applicant: Il Kwon Shim ,  Seng Guan Chow ,  Yaojian Lin

Inventor： Il Kwon Shim ,  Seng Guan Chow ,  Yaojian Lin

IPC: H01L23/482 ,  H01L21/50

CPC classification number: H01L23/562 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/19 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/81805 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device is made by forming a first conductive layer over a sacrificial carrier. A conductive pillar is formed over the first conductive layer. An active surface of a semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the conductive pillar. The carrier and adhesive layer are removed. A stress relief insulating layer is formed over the active surface of the semiconductor die and a first surface of the encapsulant. The stress relief insulating layer has a first thickness over the semiconductor die and a second thickness less than the first thickness over the encapsulant. A first interconnect structure is formed over the stress relief insulating layer. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The first and second interconnect structures are electrically connected through the conductive pillar.

Abstract translation: 通过在牺牲载体上形成第一导电层来制造半导体器件。 在第一导电层上形成导电柱。 半导体管芯的有源表面安装在载体上。 密封剂沉积在半导体管芯上方并围绕导电柱。 去除载体和粘合剂层。 在半导体管芯的有源表面和密封剂的第一表面上形成应力消除绝缘层。 应力消除绝缘层在半导体管芯上方具有第一厚度，并且第二厚度小于密封剂上的第一厚度。 在应力消除绝缘层上形成第一互连结构。 在与第一互连结构相对的密封剂的第二表面上形成第二互连结构。 第一和第二互连结构通过导电柱电连接。