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    High-frequency circuit
    4.
    发明授权
    High-frequency circuit 有权

    公开(公告)号：US11812546B2

    公开(公告)日：2023-11-07

    申请号：US17783094

    申请日：2021-05-10

    Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC. ,  SUMITOMO ELECTRIC INDUSTRIES, LTD.

    Inventor： Koji Nitta ,  Takafumi Uemiya ,  Suguru Yamagishi ,  Shigeki Shimada ,  Hiroshi Ueda ,  Satoshi Kiya

    IPC: H05K1/02

    CPC classification number: H05K1/0242 ,  H05K1/024 ,  H05K2201/0715 ,  H05K2201/09609 ,  H05K2201/09854

    Abstract: A high-frequency circuit includes a first dielectric layer, a circuit layer, a second dielectric layer arranged in this order, the circuit layer includes a transmission line of a high-frequency signal and a ground pattern disposed around the transmission line. An electromagnetic wave shield is disposed in the first dielectric layer and the second dielectric layer around the transmission line. The electromagnetic wave shield includes a first ground electric conductor formed on an inner surface of at least one first hole formed to extend through the first dielectric layer without extending through the ground pattern, and a second ground electric conductor formed on an inner surface of at least one second hole formed to extend through the second dielectric layer without extending through the ground pattern. The first ground electric conductor and the second ground electric conductor are each electrically connected to the ground pattern.

    CIRCUIT BOARD
    6.
    发明公开
    CIRCUIT BOARD 审中-公开

    公开(公告)号：US20230199959A1

    公开(公告)日：2023-06-22

    申请号：US17996285

    申请日：2021-04-16

    Applicant: LG INNOTEK CO., LTD.

    Inventor： Won Suk JUNG

    IPC: H05K1/11 ,  H05K1/02

    CPC classification number: H05K1/116 ,  H05K1/0298 ,  H05K2201/09854 ,  H05K2201/09827

    Abstract: A circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on an upper surface of the first insulating layer; a first circuit pattern buried in a lower region of the first insulating layer and including a first via pad; a second circuit pattern disposed between the first insulating layer and the second insulating layer and including a second via pad; a third circuit pattern buried in an upper region of the second insulating layer and including a third via pad; a first via disposed in the first insulating layer and connecting the first via pad and the second via pad; and a second via disposed in the second insulating layer and connecting the second via pad and the third via pad, and wherein at least one of an upper surface and a lower surface of the second via includes a convex portion in an upward or downward direction.

    GLASS SUBSTRATE AND GLASS SUBSTRATE FOR HIGH FREQUENCY DEVICE
    8.
    发明申请
    GLASS SUBSTRATE AND GLASS SUBSTRATE FOR HIGH FREQUENCY DEVICE 审中-公开

    公开(公告)号：US20180317319A1

    公开(公告)日：2018-11-01

    申请号：US15962076

    申请日：2018-04-25

    Applicant: Asahi Glass Company, Limited

    Inventor： Shigetoshi MORI ,  Motoshi ONO ,  Mamoru ISOBE ,  Kohei HORIUCHI

    IPC: H05K1/03 ,  H05K1/11

    CPC classification number: H05K1/0306 ,  H05K1/115 ,  H05K3/002 ,  H05K3/0029 ,  H05K2201/09854

    Abstract: A glass substrate includes a plurality of through holes that penetrate from a first surface to a second surface of the glass substrate. Each through hole has an upper aperture with a first diameter on the first surface and a lower aperture with a second diameter on the second surface. For each of ten through holes selected from the plurality of through holes, a side wall length is obtained from the first and second diameters and the thickness of the glass substrate, and an R value is obtained by dividing the side wall length by the thickness of the glass substrate. The R values fall within a range of 1 to 1.1. A B value, obtained from dividing a difference between the greatest R value and the smallest R value by an average of the R values followed by multiplication with 100, is 5% or less.

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