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公开(公告)号：US20230038862A1
公开(公告)日：2023-02-09
申请号：US17855721
申请日：2022-06-30
Applicant: Intel Corporation
Inventor： Balaji CHANDRASEKHARAN , Jayakrishna S , Pattabhiraman K , Altug KOKER
IPC: G06F9/50
Abstract: Examples include techniques to arbitrate a plurality of input requests received from input clients that request data to be stored or placed in a destination. An arbiter may be arranged to grant an input request based on an assigned weight and based on an indication that the destination is ready to receive the data to be stored or placed in the destination.
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公开(公告)号：US11288191B1
公开(公告)日：2022-03-29
申请号：US17132147
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Hema Chand Nalluri , Aditya Navale , Altug Koker , Brandon Fliflet , Jeffery S. Boles , James Valerio , Vasanth Ranganathan , Anirban Kundu , Pattabhiraman K
IPC: G06F12/0802
Abstract: An apparatus to facilitate memory flushing is disclosed. The apparatus comprises a cache memory, one or more processing resources, tracker hardware to dispatch workloads for execution at the processing resources and to monitor the workloads to track completion of the execution, range based flush (RBF) hardware to process RBF commands and generate a flush indication to flush data from the cache memory and a flush controller to receive the flush indication and perform a flush operation to discard data from the cache memory at an address range provided in the flush indication.
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公开(公告)号：US11263141B2
公开(公告)日：2022-03-01
申请号：US17026264
申请日：2020-09-20
Applicant: Intel Corporation
Inventor： Abhishek R. Appu , Altug Koker , Joydeep Ray , David Puffer , Prasoonkumar Surti , Lakshminarayanan Striramassarma , Vasanth Ranganathan , Kiran C. Veernapu , Balaji Vembu , Pattabhiraman K
IPC: G06F12/0877 , G06F12/0802 , G06F12/0855 , G06F12/0806 , G06F12/0846 , G06F12/0868 , G06T1/60 , G06F12/126 , G06F12/0893
Abstract: In an example, an apparatus comprises a plurality of execution units, and a cache memory communicatively coupled to the plurality of execution units, wherein the cache memory is structured into a plurality of sectors, wherein each sector in the plurality of sectors comprises at least two cache lines. Other embodiments are also disclosed and claimed.
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公开(公告)号：US20210382548A1
公开(公告)日：2021-12-09
申请号：US17233649
申请日：2021-04-19
Applicant: Intel Corporation
Inventor： Altug Koker , Michael Apodaca , Kai Xiao , Chandrasekaran Sakthivel , Jeffery S. Boles , Adam T. Lake , James M. Holland , Pattabhiraman K , Sayan Lahiri , Radhakrishnan Venkataraman , Kamal Sinha , Ankur N. Shah , Deepak S. Vembar , Abhishek R. Appu , Joydeep Ray , Elmoustapha Ould-Ahmed-Vall
IPC: G06F3/01 , G06T15/00 , G06T3/40 , G06T1/60 , G06F3/16 , G06F3/147 , G06T19/00 , G06F3/0481 , G06T7/80
Abstract: Systems, apparatuses and methods may provide away to enhance an augmented reality (AR) and/or virtual reality (VR) user experience with environmental information captured from sensors located in one or more physical environments. More particularly, systems, apparatuses and methods may provide a way to track, by an eye tracker sensor, a gaze of a user, and capture, by the sensors, environmental information. The systems, apparatuses and methods may render feedback, by one or more feedback devices or display device, for a portion of the environment information based on the gaze of the user.
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公开(公告)号：US20210357618A1
公开(公告)日：2021-11-18
申请号：US17221283
申请日：2021-04-02
Applicant: Intel Corporation
Inventor： Radhakrishnan Venkataraman , James M. Holland , Sayan Lahiri , Pattabhiraman K , Kamal Sinha , Chandrasekaran Sakthivel , Daniel Pohl , Vivek Tiwari , Philip R. Laws , Subramaniam Maiyuran , Abhishek R. Appu , ElMoustapha Ould-Ahmed-Vall , Peter L. Doyle , Devan Burke
Abstract: Systems, apparatuses, and methods may provide for technology to dynamically control a display in response to ocular characteristic measurements of at least one eye of a user.
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Patent Agency Ranking
公开(公告)号：US20210287327A1
公开(公告)日：2021-09-16
申请号：US17182256
申请日：2021-02-23
Applicant: INTEL CORPORATION
Inventor： Abhishek R. APPU , Joydeep RAY , Altug KOKER , Balaji VEMBU , Pattabhiraman K , Matthew B. CALLAWAY
Abstract: An apparatus and method for dynamic provisioning, quality of service, and prioritization in a graphics processor. For example, one embodiment of an apparatus comprises a graphics processing unit (GPU) comprising a plurality of graphics processing resources; slice configuration hardware logic to logically subdivide the graphics processing resources into a plurality of slices; and slice allocation hardware logic to allocate a designated number of slices to each virtual machine (VM) of a plurality of VMs running in a virtualized execution environment, the slice allocation hardware logic to allocate different numbers of slices to different VMs based on graphics processing requirements and/or priorities of each of the VMs.
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公开(公告)号：US10983594B2
公开(公告)日：2021-04-20
申请号：US16515315
申请日：2019-07-18
Applicant: Intel Corporation
Inventor： Altug Koker , Michael Apodaca , Kai Xiao , Chandrasekaran Sakthivel , Jeffery S. Boles , Adam T. Lake , James M. Holland , Pattabhiraman K , Sayan Lahiri , Radhakrishnan Venkataraman , Kamal Sinha , Ankur N. Shah , Deepak S. Vembar , Abhishek R. Appu , Joydeep Ray , Elmoustapha Ould-Ahmed-Vall
IPC: G06F3/01 , G06T15/00 , G06T3/40 , G06T1/60 , G06F3/16 , G06F3/147 , G06T19/00 , G06F3/0481 , G06T7/80
Abstract: Systems, apparatuses and methods may provide away to enhance an augmented reality (AR) and/or virtual reality (VR) user experience with environmental information captured from sensors located in one or more physical environments. More particularly, systems, apparatuses and methods may provide a way to track, by an eye tracker sensor, a gaze of a user, and capture, by the sensors, environmental information. The systems, apparatuses and methods may render feedback, by one or more feedback devices or display device, for a portion of the environment information based on the gaze of the user.
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公开(公告)号：US10937123B2
公开(公告)日：2021-03-02
申请号：US16505555
申请日：2019-07-08
Applicant: INTEL CORPORATION
Inventor： Abhishek R. Appu , Joydeep Ray , Altug Koker , Balaji Vembu , Pattabhiraman K , Matthew B. Callaway
Abstract: An apparatus and method for dynamic provisioning, quality of service, and prioritization in a graphics processor. For example, one embodiment of an apparatus comprises a graphics processing unit (GPU) comprising a plurality of graphics processing resources; slice configuration hardware logic to logically subdivide the graphics processing resources into a plurality of slices; and slice allocation hardware logic to allocate a designated number of slices to each virtual machine (VM) of a plurality of VMs running in a virtualized execution environment, the slice allocation hardware logic to allocate different numbers of slices to different VMs based on graphics processing requirements and/or priorities of each of the VMs.
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公开(公告)号：US20200320177A1
公开(公告)日：2020-10-08
申请号：US16792822
申请日：2020-02-17
Applicant: INTEL CORPORATION
Inventor： Joydeep RAY , Abhishek R. APPU , Pattabhiraman K , Balaji VEMBU , Altug KOKER
IPC: G06F21/10 , G06F12/14 , G06F12/0895 , G06F9/455 , G06F12/0815 , G06T15/00 , H04N19/00 , H04N21/4405
Abstract: An apparatus and method for protecting content in a graphics processor. For example, one embodiment of an apparatus comprises: encode/decode circuitry to decode protected audio and/or video content to generate decoded audio and/or video content; a graphics cache of a graphics processing unit (GPU) to store the decoded audio and/or video content; first protection circuitry to set a protection attribute for each cache line containing the decoded audio and/or video data in the graphics cache; a cache coherency controller to generate a coherent read request to the graphics cache; second protection circuitry to read the protection attribute to determine whether the cache line identified in the read request is protected, wherein if it is protected, the second protection circuitry to refrain from including at least some of the data from the cache line in a response.
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50.发明授权公开(公告)号：US10796472B2
公开(公告)日：2020-10-06
申请号：US16024821
申请日：2018-06-30
Applicant: Intel Corporation
Inventor： Michael Apodaca , Ankur Shah , Ben Ashbaugh , Brandon Fliflet , Hema Nalluri , Pattabhiraman K , Peter Doyle , Joseph Koston , James Valerio , Murali Ramadoss , Altug Koker , Aditya Navale , Prasoonkumar Surti , Balaji Vembu
IPC: G06T15/00
Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.
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