公开(公告)号：US20170256019A1

公开(公告)日：2017-09-07

申请号：US15062691

申请日：2016-03-07

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Kritika Bala ,  Murali Ramadoss ,  Hema Nalluri ,  Jeffery Boles ,  Jeffrey Frizzell ,  Joseph Koston

IPC: G06T1/20

CPC classification number: G06T1/20 ,  G06F9/4881 ,  G06F2009/45579

Abstract: Embodiments provide for an apparatus comprising a graphics processing subsystem including one or more graphics engines and a graphics scheduler to schedule a submission queue of multiple work items for execution on the one or more graphics engines of the graphics processing subsystem. The graphics scheduler can be configured to build the submission queue via a write to a memory mapped address that is mapped to logic within the graphics processing subsystem and to explicitly submit the submission queue to the graphics engine after the build of the submission queue.

公开(公告)号：US11960896B2

公开(公告)日：2024-04-16

申请号：US17529924

申请日：2021-11-18

Applicant: Intel Corporation

Inventor： Harsh Chheda ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Eric R. Crawford

IPC: G06F9/38 ,  G06F1/24 ,  G06F9/46 ,  G06F9/54 ,  G06T1/20 ,  G06T1/60

CPC classification number: G06F9/3861 ,  G06F1/24 ,  G06F9/38585 ,  G06F9/3877 ,  G06F9/542

Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.

公开(公告)号：US20230094002A1

公开(公告)日：2023-03-30

申请号：US17484711

申请日：2021-09-24

Applicant: Intel Corporation

Inventor： Hema Chand Nalluri ,  Jeffery S. Boles ,  Joseph Koston ,  Ankur N. Shah ,  Vidhya Krishnan ,  Vasanth Ranganathan ,  Joydeep Ray ,  Aditya Navale ,  Murali Ramadoss ,  James Valerio

IPC: G06F9/48 ,  G06T1/20

Abstract: Dynamic routing of texture-load in graphics processing is described. An example of an apparatus includes a graphics processor including a plurality of processing engines of a class of processing engines of the graphic processor; a set of queues for the plurality of processing engines; and a unified submit port for the plurality of processing engines, wherein the unified submit port is to notify a scheduler regarding availability of slots in the set of queues for receipt of workload contexts; and wherein, upon the unified submit port receiving a workload context for processing by the plurality of processing engines, the unified submit port is to detect an available processing engine of the plurality of processing engines and direct the received context to a slot of the set of queues for processing by the available processing engine.

公开(公告)号：US20220156085A1

公开(公告)日：2022-05-19

申请号：US17529924

申请日：2021-11-18

Applicant: Intel Corporation

Inventor： Harsh Chheda ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Eric R. Crawford

IPC: G06F9/38 ,  G06F1/24 ,  G06F9/54

Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.

公开(公告)号：US20210398243A1

公开(公告)日：2021-12-23

申请号：US17362230

申请日：2021-06-29

Applicant: Intel Corporation

Inventor： Ankur N. Shah ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Murali Ramadoss

IPC: G06T1/20 ,  G06T15/00 ,  G06F9/455 ,  G06F9/38 ,  G06F9/50

Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.

公开(公告)号：US11055809B2

公开(公告)日：2021-07-06

申请号：US16457029

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Ankur N. Shah ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Murali Ramadoss

IPC: G06F15/00 ,  G06T1/20 ,  G06T15/00 ,  G06F9/455 ,  G06F9/38 ,  G06F9/50

Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.

公开(公告)号：US10796472B2

公开(公告)日：2020-10-06

申请号：US16024821

申请日：2018-06-30

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  Ankur Shah ,  Ben Ashbaugh ,  Brandon Fliflet ,  Hema Nalluri ,  Pattabhiraman K ,  Peter Doyle ,  Joseph Koston ,  James Valerio ,  Murali Ramadoss ,  Altug Koker ,  Aditya Navale ,  Prasoonkumar Surti ,  Balaji Vembu

IPC: G06T15/00

Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.

公开(公告)号：US11436696B2

公开(公告)日：2022-09-06

申请号：US17362230

申请日：2021-06-29

Applicant: Intel Corporation

Inventor： Ankur N. Shah ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Murali Ramadoss

IPC: G06F15/00 ,  G06T1/20 ,  G06T15/00 ,  G06F9/455 ,  G06F9/38 ,  G06F9/50

Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.

公开(公告)号：US11200063B2

公开(公告)日：2021-12-14

申请号：US16143777

申请日：2018-09-27

Applicant: Intel Corporation

Inventor： Harsh Chheda ,  Nishanth Reddy Pendluru ,  Joseph Koston ,  Eric R. Crawford

IPC: G06F9/30 ,  G06F9/38 ,  G06F1/24 ,  G06F9/54

Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.

公开(公告)号：US10937119B2

公开(公告)日：2021-03-02

申请号：US16790397

申请日：2020-02-13

Applicant: Intel Corporation

Inventor： Murali Ramadoss ,  Penne Lee ,  Ankur Shah ,  Ping Liu ,  Joseph Koston

IPC: G06T1/20 ,  G06T15/00 ,  G06F9/48 ,  G06F9/50

Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.