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    Network on layer enabled architectures
    43.
    发明授权
    Network on layer enabled architectures 有权

    公开(公告)号：US11264361B2

    公开(公告)日：2022-03-01

    申请号：US16678342

    申请日：2019-11-08

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba

    IPC: H01L23/52 ,  H01L21/82 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  G06F15/78 ,  H01L23/532 ,  G06F15/76

    Abstract: The technology relates to a system on chip (SoC). The SoC may include a network on layer including one or more routers and an application specific integrated circuit (ASIC) layer bonded to the network layer, the ASIC layer including one or more components. In some instances, the network layer and the ASIC layer each include an active surface and a second surface opposite the active surface. The active surface of the ASIC layer and the second surface of the network may each include one or more contacts, and the network layer may be bonded to the ASIC layer via bonds formed between the one or more contacts on the second surface of the network layer and the one or more contacts on the active surface of the ASIC layer.

    ACTIVE BRIDGING APPARATUS
    44.
    发明申请
    ACTIVE BRIDGING APPARATUS 有权

    公开(公告)号：US20210351159A1

    公开(公告)日：2021-11-11

    申请号：US16868701

    申请日：2020-05-07

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba ,  Rajesh Katkar

    IPC: H01L25/065 ,  H01L23/50 ,  H01L23/00 ,  H03K19/0175 ,  H03K17/56

    Abstract: Techniques and mechanisms for coupling chiplets to microchips utilizing active bridges. The active bridges include circuits that provide various functions and capabilities that previously may have been located on the microchips and/or the chiplets. Furthermore, the active bridges may be coupled to the microchips and the chiplets via “native interconnects” utilizing direct bonding techniques. Utilizing the active bridges and the direct bonding techniques of the active bridges to the microchips and the chiplets, the pitch for the interconnects can be greatly reduced going from a pitch in the millimeters to a fine pitch that may be in a range of less than one micron to approximately five microns.

    Embedded organic interposer for high bandwidth
    45.
    发明授权
    Embedded organic interposer for high bandwidth 有权

    公开(公告)号：US11063017B2

    公开(公告)日：2021-07-13

    申请号：US16555127

    申请日：2019-08-29

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba

    IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L23/498 ,  H05K1/02 ,  H05K3/46 ,  H01L23/538 ,  H01L25/18 ,  H01L23/15 ,  H05K1/18

    Abstract: Embedded organic interposers for high bandwidth are provided. Example embedded organic interposers provide thick conductors with more dielectric space, and more routing layers of such conductors than conventional interposers, in order to provide high bandwidth transmission capacity over longer spans. The embedded organic interposers provide high bandwidth transmission paths between components such as HBM, HBM2, and HBM3 memory stacks, and other components. To provide the thick conductors and more routing layers for greater transmission capacity, extra space is achieved by embedding the organic interposers in the core of the package. Example embedded organic interposers lower a resistive-capacitive (RC) load of the routing layers to provide an improved data transfer rate of 1 gigabits per second over at least a 6 mm span, for example. The embedded interposers are not limited to use with memory modules.

    Formation of a light-emitting diode display
    46.
    发明授权
    Formation of a light-emitting diode display 有权

    公开(公告)号：US11024220B2

    公开(公告)日：2021-06-01

    申请号：US15994987

    申请日：2018-05-31

    Applicant: Invensas Corporation

    Inventor： Liang Wang ,  Rajesh Katkar ,  Javier A. Delacruz ,  Ilyas Mohammed ,  Belgacem Haba

    IPC: G09G3/32 ,  G09G3/20 ,  H01L33/58 ,  H01L33/38

    Abstract: Apparatus and method relating generally to an LED display is disclosed. In such an apparatus, a driver die has a plurality of driver circuits. A plurality of light-emitting diodes, each having a thickness of 10 microns or less and discrete with respect to one another, are respectively interconnected to the plurality of driver circuits. The plurality of light-emitting diodes includes a first portion for a first color, a second portion for a second color, and a third portion for a third color respectively obtained from a first, a second, and a third optical wafer. The first, the second, and the third color are different from one another.

    Scalable Architecture for Reduced Cycles Across SoC
    47.
    发明申请
    Scalable Architecture for Reduced Cycles Across SoC 有权

    公开(公告)号：US20210143125A1

    公开(公告)日：2021-05-13

    申请号：US16677213

    申请日：2019-11-07

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Richard E. Perego

    IPC: H01L25/065 ,  H01L23/48 ,  H01L23/00

    Abstract: A microelectronic assembly may include a semiconductor wafer having first and second surfaces extending in first and second directions, the semiconductor wafer having network nodes connected to one another via local adjacent connections each extending in only one of the first and second directions, and an interconnection structure comprising a low-loss dielectric material and having first and second opposite surfaces extending in third and fourth directions each oriented at an oblique angle relative to the first and second directions, the interconnection structure having local oblique connections each extending in only one of the third and fourth directions. The semiconductor wafer may be directly bonded to the interconnection structure such that each of the network nodes is connected with at least one of the other network nodes, without use of conductive bonding material, through at least one of the local adjacent connections and at least one of the local oblique connections.

    EMBEDDED ORGANIC INTERPOSER FOR HIGH BANDWIDTH
    48.
    发明申请
    EMBEDDED ORGANIC INTERPOSER FOR HIGH BANDWIDTH 审中-公开

    公开(公告)号：US20190385978A1

    公开(公告)日：2019-12-19

    申请号：US16555127

    申请日：2019-08-29

    Applicant: Invensas Corporation

    Inventor： Javier A. Delacruz ,  Belgacem Haba

    IPC: H01L25/065 ,  H01L23/498 ,  H01L25/16 ,  H01L25/00

    Abstract: Embedded organic interposers for high bandwidth are provided. Example embedded organic interposers provide thick conductors with more dielectric space, and more routing layers of such conductors than conventional interposers, in order to provide high bandwidth transmission capacity over longer spans. The embedded organic interposers provide high bandwidth transmission paths between components such as HBM, HBM2, and HBM3 memory stacks, and other components. To provide the thick conductors and more routing layers for greater transmission capacity, extra space is achieved by embedding the organic interposers in the core of the package. Example embedded organic interposers lower a resistive-capacitive (RC) load of the routing layers to provide an improved data transfer rate of 1 gigabits per second over at least a 6 mm span, for example. The embedded interposers are not limited to use with memory modules.

    VERTICAL CAPACITORS FOR MICROELECTRONICS
    50.
    发明申请
    VERTICAL CAPACITORS FOR MICROELECTRONICS 审中-公开

    公开(公告)号：US20190214353A1

    公开(公告)日：2019-07-11

    申请号：US16217622

    申请日：2018-12-12

    Applicant: Invensas Corporation

    Inventor： Belgacem Haba ,  Javier A. Delacruz

    IPC: H01L23/66 ,  H01L23/498 ,  H01L25/16 ,  H01L23/00 ,  H01L21/48 ,  H01L49/02

    Abstract: Vertical capacitors for microelectronics are provided. An example thin capacitor layer can provide one or numerous capacitors to a semiconductor chip or integrated circuit. In an implementation, a thin capacitor layer of 50-100 μm thickness may have 5000 vertically disposed capacitor plates per linear centimeter, while occupying only a thin slice of the package. Electrodes for each capacitor plate are accessible at multiple surfaces. Electrode density for very fine pitch interconnects can be in the range of 2-200 μm separation between electrodes. A redistribution layer (RDL) may be fabricated on one or both sides of the thin capacitor layer to provide fan-out ball grid arrays that occupy insignificant space. RDLs or through-vias can connect together sets of the interior vertical capacitor plates within a given thin capacitor layer to form various capacitors from the plates to meet the needs of particular chips, dies, integrated circuits, and packages.

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