公开(公告)号：US20210134848A1

公开(公告)日：2021-05-06

申请号：US17148653

申请日：2021-01-14

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Toshihide JINNAI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

Abstract: An object of the present invention is to provide a technology using which, in a thin film transistor using oxide semiconductor, the resistance of a channel region of the oxide semiconductor is made high, and at the same time the resistances of a source region and a drain region of the oxide semiconductor are made low. There is provided a semiconductor device including: a thin film transistor including oxide semiconductor, the oxide semiconductor including a channel region, a drain region, and a source region; a gate insulating film formed on the channel region; an aluminum oxide film formed on the gate insulating film; and a gate electrode formed on the aluminum oxide film, wherein the aluminum oxide film has a region that covers neither the drain region nor the source region in a plane view.

公开(公告)号：US20200350341A1

公开(公告)日：2020-11-05

申请号：US16931454

申请日：2020-07-17

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Yohei YAMAGUCHI ,  Hirokazu WATANABE ,  Isao SUZUMURA

IPC: H01L27/12 ,  H01L27/32 ,  G02F1/1368

Abstract: The purpose of the present invention is to realize the display device having thin film transistors of the oxide semiconductor of stable characteristics. An example of the concrete structure is that: A display device having a substrate including a display area, plural pixels formed in the display area, the pixel includes a first thin film transistor having an oxide semiconductor film, a first insulating film made of a first silicon oxide on a first side of the oxide semiconductor film, a second insulating film made of a second silicon oxide on a second side of the oxide semiconductor film, wherein oxygen desorption amount per unit area from the first insulating film is larger than that from the second insulating film, when measured by TDS (Thermal Desorption Spectrometry) provided M/z=32 and a measuring range in temperature is from 100 centigrade to 500 centigrade.

公开(公告)号：US20200333652A1

公开(公告)日：2020-10-22

申请号：US16918453

申请日：2020-07-01

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Isao SUZUMURA ,  Hajime WATAKABE

IPC: G02F1/1333 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1362 ,  H01L27/12 ,  G09F9/30 ,  H05K1/18 ,  G02F1/1339 ,  H01L27/32 ,  H01L51/00

Abstract: The purpose of the invention is to realize the flexible display device of high reliability; specifically in a structure that a bending area is in a terminal area, and in that disconnection of the wiring does not occur in the bending area. The concrete structure is that: a display device having a display area, a driving circuit area and a bending area comprising: a first thin film transistor and a first interlayer insulating film are formed in the display area, a second thin film transistor and a second interlayer insulating film are formed in the driving circuit area, terminal wirings to connects the display area and the driving circuit area are formed in the bending area.

公开(公告)号：US20200326571A1

公开(公告)日：2020-10-15

申请号：US16911930

申请日：2020-06-25

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Tomoyuki ITO

IPC: G02F1/1368 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

Abstract: The purpose of the present invention is to suppress the change in characteristics of the TFT formed on the polyimide substrate. An example of the present invention is a display device having a first TFT of an oxide semiconductor film and a second TFT of a polysilicon film formed on the substrate made of resin including the first TFT and the second TFT do not overlap in a plan view, a distance between the second TFT and the substrate is shorter than a distance between the first TFT and the substrate in a cross sectional view, a second polysilicon film is formed between the oxide semiconductor film and the substrate, the second polysilicon film is made of the same material as the first polysilicon film and is formed on the same layer that the first polysilicon is formed.

公开(公告)号：US20170200829A1

公开(公告)日：2017-07-13

申请号：US15388720

申请日：2016-12-22

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Tomoyuki ARIYOSHI ,  Akihiro HANADA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24

CPC classification number: H01L29/78606 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869

Abstract: According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region.

公开(公告)号：US20250113546A1

公开(公告)日：2025-04-03

申请号：US18897024

申请日：2024-09-26

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Kentaro MIURA ,  Takeshi SAKAI ,  Akihiro HANADA ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423

Abstract: A semiconductor device includes a gate electrode, an oxide semiconductor layer having a polycrystalline structure, and a gate insulating layer between the gate electrode and the oxide semiconductor layer. The oxide semiconductor layer includes a source region and a drain region each containing an impurity element, a channel region between the source region and the drain region, and a first region adjacent to the channel region. The first region includes a first edge extending along a first direction travelling from the source region to the drain region. The first region has a higher electrical resistivity than each of the source region and the drain region. An etching rate of the oxide semiconductor layer is less than 3 nm/min when the oxide semiconductor layer is etched using an etching solution containing phosphoric acid as a main component at 40° C.

公开(公告)号：US20250081617A1

公开(公告)日：2025-03-06

申请号：US18817366

申请日：2024-08-28

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Akihiro HANADA ,  Takaya TAMARU ,  Marina MOCHIZUKI ,  Masahiro WATABE

IPC: H01L27/12 ,  G02F1/1368

Abstract: A display device having a plurality of pixels arranged in a matrix along a first direction and a second direction intersecting the first direction, each of the plurality of pixels includes, a transistor including an oxide semiconductor layer, a gate wiring extending in the first direction opposite the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate wiring, a first conductive layer provided on at least one first insulating layer above the transistor and in contact with the oxide semiconductor layer, a second insulating layer provided on the first conductive layer, a first inorganic layer provided on the second insulating layer and having openings therein, and a second inorganic layer provided on the first inorganic layer and in contact with the second insulating layer in the opening.

公开(公告)号：US20240113228A1

公开(公告)日：2024-04-04

申请号：US18479934

申请日：2023-10-03

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Akihiro HANADA ,  Takaya TAMARU

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/425 ,  H01L21/4757 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/425 ,  H01L21/47576 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device according to an embodiment includes: an oxide insulating layer; an oxide semiconductor layer; a gate electrode; a gate insulating layer; and a first insulating layer, wherein the semiconductor device is divided into a first to a third regions, a thickness of the gate insulating layer in the first region is 200 nm or more, the gate electrode contacts the first insulating layer in the first region, the oxide semiconductor layer contacts the first insulating layer in the second region, an amount of impurities contained in the oxide semiconductor layer in the second region is greater than an amount of impurities contained in the oxide semiconductor layer in the first region, and an amount of impurities contained in the oxide insulating layer in the third region is greater than an amount of impurities contained in the oxide insulating layer in the second region.

公开(公告)号：US20240113227A1

公开(公告)日：2024-04-04

申请号：US18476910

申请日：2023-09-28

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Akihiro HANADA ,  Takaya TAMARU

IPC: H01L29/786 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42384

Abstract: A method for manufacturing semiconductor device according to an embodiment includes: forming an oxide semiconductor layer above a substrate; forming a gate insulating layer above the oxide semiconductor layer; forming a metal oxide layer containing aluminum as a main component above the gate insulating layer; performing a heat treatment in a state where the metal oxide layer is formed above the gate insulating layer; removing the metal oxide layer after the heat treatment; and forming a gate electrode above the gate insulating layer.

公开(公告)号：US20240088192A1

公开(公告)日：2024-03-14

申请号：US18515288

申请日：2023-11-21

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Akihiro HANADA ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Fumiya KIMURA ,  Isao SUZUMURA

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14636 ,  H01L27/14689

Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.