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    Encapsulated dies with enhanced thermal performance
    47.
    发明授权
    Encapsulated dies with enhanced thermal performance 有权

    公开(公告)号：US09576822B2

    公开(公告)日：2017-02-21

    申请号：US14959129

    申请日：2015-12-04

    Applicant: RF Micro Devices, Inc.

    Inventor： Thomas Scott Morris ,  David Jandzinski ,  Stephen Parker ,  Jon Chadwick ,  Julio C. Costa

    IPC: H01L21/50 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/373

    Abstract: The present disclosure relates to enhancing the thermal performance of encapsulated flip chip dies. According to an exemplary process, a plurality of flip chip dies are attached on a top surface of a carrier, and a first mold compound is applied over the top surface of the carrier to encapsulate the plurality of flip chip dies. The first mold compound is thinned down to expose a substrate of each flip chip die and the substrate of each flip chip die is then substantially etched away to provide an etched flip chip die that has an exposed surface at the bottom of a cavity. Next, a second mold compound with high thermal conductivity is applied to substantially fill each cavity and the top surface of the second mold compound is planarized. Finally, the encapsulated etched flip chip dies can be marked, singulated, and tested as a module.

    RADIO FREQUENCY (RF) MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES WITH GOLD-DOPED SILICON
    48.
    发明申请
    RADIO FREQUENCY (RF) MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES WITH GOLD-DOPED SILICON 有权
    具有金色硅的无线电频率（RF）微电子系统（MEMS）器件

    公开(公告)号：US20160023892A1

    公开(公告)日：2016-01-28

    申请号：US14805774

    申请日：2015-07-22

    Applicant: RF Micro Devices, Inc.

    Inventor： Julio C. Costa ,  Michael Carroll ,  Jonathan Hale Hammond

    IPC: B81B7/00

    CPC classification number: B81B7/0064 ,  H01H1/0036

    Abstract: The present disclosure relates to radio frequency (RF) microelectromechanical system (MEMS) device packaging, and specifically to reducing harmonic distortion caused by such packaging. In one embodiment, a die is provided that employs a gold-doped silicon substrate, wherein at least one RF MEMS device is disposed on the gold-doped silicon substrate. By employing the gold-doped silicon substrate, the packaging can achieve an exceptionally high resistivity without any additional expensive components, wherein the high resistivity has an associated low carrier lifetime. Notably, the low carrier lifetime corresponds to reduced harmonic distortion generated by the gold-doped silicon substrate, even when operating at high power. Thus, the gold-doped silicon substrate provides a less expensive packaging in which to place RF MEMS devices, wherein the packaging is capable of operating at high power with reduced harmonic distortion.

    Abstract translation: 本公开涉及射频（RF）微机电系统（MEMS）设备封装，并且具体涉及减少由这种封装引起的谐波失真。 在一个实施例中，提供了一种使用金掺杂硅衬底的管芯，其中至少一个RF MEMS器件设置在掺金硅衬底上。 通过采用金掺杂硅衬底，封装可以实现非常高的电阻率，而没有任何额外的昂贵的组件，其中高电阻率具有相关联的低载流子寿命。 值得注意的是，低载流子寿命对应于由金掺杂硅衬底产生的减少的谐波失真，即使在高功率下操作。 因此，金掺杂硅衬底提供了一种较便宜的封装，其中放置RF MEMS器件，其中封装能够以较低功率运行并减少谐波失真。

    SILICON-ON-PLASTIC SEMICONDUCTOR DEVICE WITH INTERFACIAL ADHESION LAYER
    50.
    发明申请
    SILICON-ON-PLASTIC SEMICONDUCTOR DEVICE WITH INTERFACIAL ADHESION LAYER 有权
    具有界面粘合层的硅塑料半导体器件

    公开(公告)号：US20150255368A1

    公开(公告)日：2015-09-10

    申请号：US14715830

    申请日：2015-05-19

    Applicant: RF Micro Devices, Inc.

    Inventor： Julio C. Costa

    IPC: H01L23/373 ,  H01L21/762 ,  H01L27/12

    CPC classification number: H01L21/76251 ,  H01L21/568 ,  H01L21/7624 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3192 ,  H01L23/36 ,  H01L23/3737 ,  H01L27/1203 ,  H01L27/1266 ,  H01L29/78603 ,  H01L29/78606 ,  H01L2224/13 ,  H01L2224/13022

    Abstract: A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a polymer substrate and an interfacial layer over the polymer substrate. A buried oxide layer resides over the interfacial layer, and a device layer with at least a portion of a field effect device resides over the buried oxide layer. The polymer substrate is molded over the interfacial adhesion layer and has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity greater than 1012 Ohm-cm. Methods of manufacture for the semiconductor device include removing a wafer handle to expose a first surface of the buried oxide layer, disposing the interfacial adhesion layer onto the first surface of the buried oxide layer, and molding the polymer substrate onto the interfacial adhesion layer.

    Abstract translation: 公开了一种半导体器件及其制造方法。 半导体器件包括聚合物衬底和聚合物衬底上的界面层。 掩埋氧化物层位于界面层上，并且具有场效应器件的至少一部分的器件层驻留在掩埋氧化物层上。 聚合物基材在界面粘合层上成型，并且具有大于2瓦/米开尔文（W / mK）的热导率和大于1012欧姆 - 厘米的电阻率。 半导体器件的制造方法包括去除晶片手柄以暴露掩埋氧化物层的第一表面，将界面粘合层设置在掩埋氧化物层的第一表面上，以及将聚合物基底模塑到界面粘附层上。

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