公开(公告)号：US20210159138A1

公开(公告)日：2021-05-27

申请号：US17168160

申请日：2021-02-04

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11582 ,  H01L27/11556

Abstract: Embodiments of three-dimensional (3D) memory devices have a hydrogen blocking layer and fabrication methods thereof are disclosed. In an example, a method for form a 3D memory device is disclosed. An array of NAND memory strings each extending vertically above a first substrate are formed. A plurality of logic process-compatible devices are formed on a second substrate. The first substrate and the second substrate are bonded in a face-to-face manner. The logic process-compatible devices are above the array of NAND memory strings after the bonding. The second substrate is thinned to form a semiconductor layer above and in contact with the logic process-compatible devices.

公开(公告)号：US10984862B2

公开(公告)日：2021-04-20

申请号：US16453980

申请日：2019-06-26

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu

IPC: G11C14/00 ,  G11C16/04 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L27/108 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/16

Abstract: Embodiments of three-dimensional (3D) memory devices with embedded dynamic random-access memory (DRAM) and methods for forming the 3D memory devices are disclosed. In an example, a 3D memory device includes a first semiconductor structure including a peripheral circuit, an array of embedded DRAM cells, and a first bonding layer including a plurality of first bonding contacts. The 3D memory device also further includes a second semiconductor structure including an array of 3D NAND memory strings and a second bonding layer including a plurality of second bonding contacts. The 3D memory device further includes a bonding interface between the first bonding layer and the second bonding layer. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

公开(公告)号：US10971517B2

公开(公告)日：2021-04-06

申请号：US16297520

申请日：2019-03-08

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Yi Hua Liu ,  Jun Liu ,  Lu Ming Fan

IPC: H01L29/76 ,  H01L27/11582 ,  H01L29/10 ,  H01L29/417 ,  H01L29/45 ,  H01L21/02 ,  H01L29/40 ,  H01L27/11556 ,  H01L21/311

Abstract: Embodiments of three-dimensional (3D) memory devices having source contact structure in a memory stack are disclosed. The 3D memory device has a memory stack that includes a plurality of interleaved conductor layers and insulating layers extending over a substrate, a plurality of channel structures each extending vertically through the memory stack into the substrate, and a source contact structure extending vertically through the memory stack and extending laterally to separate the memory stack into a first portion and a second portion. The source contact structure may include a plurality of source contacts each electrically coupled to a common source of the plurality of channel structures.

公开(公告)号：US20210074709A1

公开(公告)日：2021-03-11

申请号：US16669461

申请日：2019-10-30

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu

IPC: H01L27/11 ,  H01L25/065 ,  H01L27/108 ,  H01L21/02 ,  H01L21/20 ,  H01L21/822

Abstract: Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure including a processor and a first bonding layer including a plurality of first bonding contacts. The semiconductor device also includes a second semiconductor structure including an array of static random-access memory (SRAM) cells and a second bonding layer including a plurality of second bonding contacts. The semiconductor device further includes a bonding interface between the first bonding layer and the second bonding layer. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

公开(公告)号：US10937766B2

公开(公告)日：2021-03-02

申请号：US16669454

申请日：2019-10-30

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu

IPC: G11C11/34 ,  H01L25/065 ,  G11C13/00 ,  G11C16/04 ,  G11C16/10 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: Embodiments of three-dimensional (3D) memory devices with 3D phase-change memory (PCM) and methods for forming and operating the 3D memory devices are disclosed. In an example, a 3D memory device includes a first semiconductor structure including a peripheral circuit, an array of 3D PCM cells, and a first bonding layer including a plurality of first bonding contacts. The 3D memory device also further includes a second semiconductor structure including an array of 3D NAND memory strings and a second bonding layer including a plurality of second bonding contacts. The 3D memory device further includes a bonding interface between the first bonding layer and the second bonding layer. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

公开(公告)号：US20200350322A1

公开(公告)日：2020-11-05

申请号：US16565481

申请日：2019-09-09

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu ,  Weihua Cheng

IPC: H01L27/1157 ,  H01L21/50 ,  H01L27/108 ,  H01L27/06 ,  H01L27/11578 ,  H01L23/00

Abstract: Embodiments of bonded unified semiconductor chips and fabrication and operation methods thereof are disclosed. In an example, a unified semiconductor chip includes a first semiconductor structure including one or more processors, an array of embedded DRAM cells, and a first bonding layer including a plurality of first bonding contacts. The unified semiconductor chip also includes a second semiconductor structure including an array of NAND memory cells and a second bonding layer including a plurality of second bonding contacts. The unified semiconductor chip further includes a bonding interface between the first bonding layer and the second bonding layer. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

公开(公告)号：US20200350320A1

公开(公告)日：2020-11-05

申请号：US16669445

申请日：2019-10-30

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Weihua Cheng ,  Jun Liu

IPC: H01L27/11 ,  H01L25/065 ,  H01L27/108 ,  H01L21/02 ,  H01L21/20 ,  H01L21/822

Abstract: Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure including a processor, an array of static random-access memory (SRAM) cells, and a first bonding layer including a plurality of first bonding contacts. The semiconductor device also includes a second semiconductor structure including an array of NAND memory cells and a second bonding layer including a plurality of second bonding contacts. The semiconductor device further includes a bonding interface between the first bonding layer and the second bonding layer. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

公开(公告)号：US20200328181A1

公开(公告)日：2020-10-15

申请号：US16727895

申请日：2019-12-26

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Jun Liu ,  Weihua Cheng

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L21/78 ,  H01L25/00

Abstract: Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes NAND memory cells and a first bonding layer including first bonding contacts. The semiconductor device also includes a second semiconductor structure including DRAM cells and a second bonding layer including second bonding contacts. The semiconductor device also includes a third semiconductor structure including a programmable logic device and a third bonding layer including third bonding contacts. The semiconductor device further includes a first bonding interface between the first and third bonding layers, and a second bonding interface between the second and third bonding layers. The first bonding contacts are in contact with a first set of the third bonding contacts at the first bonding interface. The second bonding contacts are in contact with a second set of the third bonding contacts at the second bonding interface. The first and second bonding interfaces are in a same plane.

公开(公告)号：US10784225B2

公开(公告)日：2020-09-22

申请号：US16292273

申请日：2019-03-04

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： Zongliang Huo ,  Jun Liu ,  Jifeng Zhu ,  Jun Chen ,  Zi Qun Hua ,  Li Hong Xiao

IPC: H01L23/52 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L23/538 ,  H01L27/11582 ,  H01L27/1157 ,  H01L23/532

Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact. The second semiconductor structure includes a second device layer and a second bonding layer disposed below the second device layer and including a second bonding contact. The first bonding contact is in contact with the second bonding contact at the bonding interface. At least one of the first bonding contact or the second bonding contact is made of an indiffusible conductive material.

公开(公告)号：US12078791B2

公开(公告)日：2024-09-03

申请号：US17451498

申请日：2021-10-20

Applicant: Yangtze Memory Technologies Co., Ltd.

Inventor： Jun Liu ,  Yu Li ,  Yi Li ,  Yingfei Wang ,  Shiyan Wu ,  Qiangmin Wei

IPC: G02B21/36 ,  G02B21/16 ,  H01J37/26

CPC classification number: G02B21/367 ,  G02B21/16 ,  H01J37/261 ,  H01J2237/2802

Abstract: Aspects of the disclosure provide a method of tilting characterization. The method includes measuring a first tilting shift of structures based on a first disposition of the structures. The structures are formed in a vertical direction on a horizontal plane of a product. A second tilting shift of the structures is measured based on a second disposition of the structures. The second disposition is a horizontal flip of the first disposition. A corrected tilting shift is determined based on the first tilting shift and the second tilting shift.