公开(公告)号：US20080182400A1

公开(公告)日：2008-07-31

申请号：US11923096

申请日：2007-10-24

Applicant: Yoshihiro Machida ,  Toshio Kobayashi

Inventor： Yoshihiro Machida ,  Toshio Kobayashi

IPC: H01L21/44

CPC classification number: H01L21/486 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A manufacturing method of a semiconductor device is featured by including: a step for forming a bump on an electrode pad by a bonding wire, the electrode pad being formed in an area corresponding to a semiconductor chip of a substrate; a step in which a via hole is formed in a stacked layer-purpose substrate stacked on the substrate, a conductive layer has been formed on a first major plane of the stacked layer-purpose substrate; the via hole reaches from a second major plane of the stacked layer-purpose substrate to the conductive layer; and the via hole is embedded by conductive paste; a step for adhering the stacked layer-purpose substrate through an insulating layer onto the substrate, and for joining the conductive layer to the bump by the conductive paste; and a step for dividing the substrate in separated pieces.

Abstract translation: 半导体器件的制造方法的特征在于包括：通过接合线在电极焊盘上形成凸块的步骤，所述电极焊盘形成在与衬底的半导体芯片相对应的区域中; 在堆叠在基板上的堆叠层用基板中形成通孔的步骤，在堆叠层用基板的第一主平面上形成导电层; 通孔从堆叠层用基板的第二主平面到达导电层; 通孔由导电膏嵌入; 将叠层层用基板通过绝缘层粘附到基板上的步骤，以及通过导电膏将导电层与凸块接合的步骤; 以及用于分离碎片的基板的步骤。

公开(公告)号：US20080099911A1

公开(公告)日：2008-05-01

申请号：US11907889

申请日：2007-10-18

Applicant: Yoshihiro Machida

Inventor： Yoshihiro Machida

IPC: H01L23/49 ,  H01L21/52

CPC classification number: H05K1/186 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/4602 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: A multilayer wiring substrate mounted with an electronic component includes an electronic component, a core material layer having a first opening for accommodating the electronic component, a resin layer which is formed on one surface of the core material layer and which has a second opening greater than the first opening, a supporting layer which is formed on the other surface of the core material layer and which supports the electronic component, a plurality of connection conductor sections which are provided around the first opening and within the second opening on the one surface of the core material layer, bonding wires for electrically connecting the electronic component to the connection conductor sections, and a sealing resin filled into the first and second openings in order to seal the electronic component and the bonding wires.

Abstract translation: 安装有电子部件的多层布线基板包括电子部件，具有容纳电子部件的第一开口的芯材层，形成在芯材层的一个面上的树脂层，其具有大于 所述第一开口，形成在所述芯材料层的另一个表面上并且支撑所述电子部件的支撑层，多个连接导体部，所述多个连接导体部设置在所述第一开口的周围，并且位于所述第一开口的一个表面上 芯材料层，用于将电子部件电连接到连接导体部分的接合线以及填充到第一和第二开口中的密封树脂，以密封电子部件和接合线。

公开(公告)号：US07312536B2

公开(公告)日：2007-12-25

申请号：US11224821

申请日：2005-09-13

Applicant: Takaharu Yamano ,  Tadashi Arai ,  Yoshihiro Machida

Inventor： Takaharu Yamano ,  Tadashi Arai ,  Yoshihiro Machida

IPC: H01L23/28

CPC classification number: H01L23/293 ,  H01L21/568 ,  H01L23/29 ,  H01L23/31 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A disclosed substrate having a built-in semiconductor chip includes the built-in semiconductor chip, a resin member having the built-in semiconductor chip contained therein and external connection terminals. The resin member contains a resin and 60 to 90% by weight of spherical filler.

Abstract translation: 公开的具有内置半导体芯片的基板包括内置半导体芯片，其中包含有内置半导体芯片的树脂部件和外部连接端子。 树脂构件含有树脂和60〜90重量％的球形填料。

公开(公告)号：US20070290459A1

公开(公告)日：2007-12-20

申请号：US11794378

申请日：2006-09-15

Applicant: Ichiro Kitaura ,  Yoshihiro Machida

Inventor： Ichiro Kitaura ,  Yoshihiro Machida

IPC: B23B31/06

CPC classification number: B23B31/261 ,  B23B2260/02 ,  Y10T279/3481 ,  Y10T408/95 ,  Y10T409/309464

Abstract: A tool unclamping device is a device capable of unclamping a tool clamped to a spindle of a machine tool, and comprises a casing, an output shaft set on this casing and capable of outputting power necessary for unclamping the tool, a motor serving as a power source capable of supplying power for driving the output shaft, a power transmission mechanism transmitting the power from the motor to the output shaft and a gas cylinder serving as an auxiliary power source capable of supplying auxiliary power to this power transmission mechanism.

Abstract translation: 工具松开装置是能够松开夹在机床主轴上的工具的装置，并且包括壳体，设置在该壳体上的输出轴，并且能够输出用于松开工具所需的动力，作为动力的电动机 能够供给驱动输出轴的动力源，将电动机从电动机传递到输出轴的动力传递机构和能够向该动力传递机构供给辅助动力的辅助动力源的气缸。

公开(公告)号：US20070045867A1

公开(公告)日：2007-03-01

申请号：US11463169

申请日：2006-08-08

Applicant: Yoshihiro Machida

Inventor： Yoshihiro Machida

IPC: H01L23/48

CPC classification number: H05K1/186 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/82 ,  H01L2224/85 ,  H01L2224/86 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/305 ,  H05K2201/0195 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A board 1 according to the present invention includes a board main body 3; electronic parts 5 electrically connected to and mounted on the board main body 3; and an under-fill material 19 with which a part between the board main body 3 and a surface of the electronic parts 5 electrically connected to the board main body is filled. A hole 21 passing through a layer 19a of the under-fill material that flows outside from a connecting area of the electronic parts 5 and the board main body 3 is provided for electrically connecting other parts to the board main body.

Abstract translation: 根据本发明的板1包括板主体3; 电连接并安装在板主体3上的电子部件5; 以及填充材料19，其中板主体3与电连接到板主体的电子部件5的表面之间的部分被填充。 设置有从电子部件5和板主体3的连接区域流过外部的填充材料的层21a的孔21，用于将其他部分与板主体电连接。

公开(公告)号：US20050213932A1

公开(公告)日：2005-09-29

申请号：US11044565

申请日：2005-01-28

Applicant: Hiroyuki Yuri ,  Keita Itoh ,  Motoyuki Suzuki ,  Koki Abe ,  Yoshihiro Machida ,  Masayuki Inoue ,  Kentaro Hirano

Inventor： Hiroyuki Yuri ,  Keita Itoh ,  Motoyuki Suzuki ,  Koki Abe ,  Yoshihiro Machida ,  Masayuki Inoue ,  Kentaro Hirano

IPC: H04N5/76 ,  G11B19/00 ,  H04N5/761 ,  H04N5/781 ,  H04N5/782 ,  H04N5/92

CPC classification number: H04N21/47214 ,  H04N5/782 ,  H04N21/84

Abstract: A video recording apparatus, wherein the electronic program table data of a broadcast program is acquired, and in response to a recording instruction for the broadcast program while viewing, the broadcast end time of the broadcast program recorded is acquired from the electronic program table data, so that the video information is recorded until the program end time from the time of the recording instruction. In the case where the broadcast program is delayed, the sum of the broadcast end time of the broadcast program to be recorded and a predetermined delay time is determined as the recording end time. From the time of the recording instruction to the program end time, the video information is recorded.

Abstract translation: 一种视频记录装置，其中获取广播节目的电子节目表数据，并且响应于在观看时的广播节目的记录指令，从电子节目表数据中获取记录的广播节目的广播结束时间， 使得视频信息被记录直到从记录指令的时间开始的程序结束时间。 在广播节目被延迟的情况下，要记录的广播节目的广播结束时间和预定的延迟时间之和被确定为记录结束时间。 从记录指令的时间到节目结束时间，记录视频信息。

公开(公告)号：US08330277B2

公开(公告)日：2012-12-11

申请号：US12971596

申请日：2010-12-17

Applicant: Yoshihiro Machida

Inventor： Yoshihiro Machida

IPC: H01L23/48

CPC classification number: H01L21/4846 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor element built-in device includes: a first substrate having a first pad thereon; a semiconductor element on the first substrate; a second substrate having a second pad thereon and mounted on the first substrate via a solder terminal having a solder coated thereon; a resin layer provided between the first substrate and the second substrate such that the solder terminal and the semiconductor element are embedded in the resin layer; and a dam provided at least partially around at least one of the first and second pads, the dam being configured to restrain the solder flowing from the solder terminal.

Abstract translation: 半导体元件内置器件包括：第一衬底，其上具有第一焊盘; 在所述第一基板上的半导体元件; 第二衬底，其上具有第二衬垫，并且经由其上涂覆有焊料的焊料端子安装在第一衬底上; 树脂层，设置在第一基板和第二基板之间，使得焊接端子和半导体元件嵌入树脂层中; 以及至少部分地围绕所述第一和第二焊盘中的至少一个设置的坝，所述坝被构造成约束从所述焊接端子流出的焊料。

公开(公告)号：US08274153B2

公开(公告)日：2012-09-25

申请号：US12820546

申请日：2010-06-22

Applicant: Yoshihiro Machida

Inventor： Yoshihiro Machida

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/5389 ,  H01L23/49822 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05144 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2924/00014

Abstract: In an electronic component built-in wiring substrate, an electronic component is mounted on a first wiring substrate. A second wiring substrate is stacked on the first wiring substrate and is connected electrically to the first wiring substrate by connection terminals. The second wiring substrate has an opening portion of a size larger than a planar area of the electronic component. An underfill resin is filled in a first space between the first wiring substrate and the electronic component, and has a raised portion which is raised along an outer peripheral side surface of the electronic component, seals a clearance between an inner peripheral edge of the opening portion and an outer peripheral edge of the electronic component and supports the second wiring substrate. A sealing resin is filled in a second space between the first and second wiring substrates.

Abstract translation: 在电子部件内置布线基板中，电子部件安装在第一布线基板上。 第二布线基板堆叠在第一布线基板上，并通过连接端子与第一布线基板电连接。 第二布线基板具有比电子部件的平面面积大的开口部。 底部填充树脂填充在第一布线基板和电子部件之间的第一空间中，并且具有沿着电子部件的外周侧表面升高的凸起部分，密封开口部分的内周边缘之间的间隙 和电子部件的外周边缘，并且支撑第二布线基板。 密封树脂填充在第一和第二布线基板之间的第二空间中。

公开(公告)号：US07906833B2

公开(公告)日：2011-03-15

申请号：US12273901

申请日：2008-11-19

Applicant: Takaharu Yamano ,  Yoshihiro Machida

Inventor： Takaharu Yamano ,  Yoshihiro Machida

IPC: H01L23/544

CPC classification number: H01L21/78 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/49816 ,  H01L24/10 ,  H01L2224/02333 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014

Abstract: A method for manufacturing a semiconductor device has preparation step of preparing a semiconductor substrate having a plurality of semiconductor chip formation regions and a scribe region arranged between the plurality of the semiconductor chip formation regions and including a substrate cutting position, a semiconductor chip formation step of forming semiconductor chips having electrode pads on the plurality of semiconductor chip formation regions, a first insulation layer formation step of forming a first insulation layer on the semiconductor chips and the scribe region of the semiconductor substrate, a second insulation layer formation step of forming a second insulation layer on the first insulation layer except for a region corresponding to the substrate cutting position, and a cutting step of cutting the semiconductor substrate at the substrate cutting position.

Abstract translation: 一种制造半导体器件的方法，具有制备具有多个半导体芯片形成区域的半导体衬底和布置在多个半导体芯片形成区域之间并包括衬底切割位置的划线区域的准备步骤，半导体芯片形成步骤 在所述多个半导体芯片形成区域上形成具有电极焊盘的半导体芯片，在所述半导体芯片上形成第一绝缘层和所述半导体基板的划线区域的第一绝缘层形成步骤，形成第二绝缘层形成工序， 除了与基板切断位置对应的区域之外的第一绝缘层上的绝缘层，以及在基板切断位置切断半导体基板的切断工序。

公开(公告)号：US07882627B2

公开(公告)日：2011-02-08

申请号：US12007040

申请日：2008-01-04

Applicant: Tetsuya Koyama ,  Tsuyoshi Kobayashi ,  Hiroyuki Kato ,  Yoshihiro Machida

Inventor： Tetsuya Koyama ,  Tsuyoshi Kobayashi ,  Hiroyuki Kato ,  Yoshihiro Machida

IPC: H01K3/00

CPC classification number: H05K3/4614 ,  H05K3/462 ,  H05K3/4647 ,  H05K2203/061 ,  H05K2203/0733 ,  H05K2203/1327 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/4916 ,  Y10T29/49165

Abstract: First, a unilayer wiring board is fabricated, which has wiring layers formed in desired shapes on both sides of an insulating base member; and a metal bump formed on the wiring layer on one side of the insulating base member. Then, a desired number of unilayer boards are prepared and stacked up. On that case, the board disposed in the uppermost layer is prepared without having a metal bump. The boards are positioned and stacked up in such a manner that a metal bump of one of adjacent boards is connected to a corresponding wiring layer of the other board. Thereafter, resin is filled into gaps between the stacked boards, and insulating layers are formed on both sides of a multilayer board obtained through the above steps, in such a manner as to cover the entire surface except pad areas defined at predetermined positions on the wiring layers.

Abstract translation: 首先，制造单层布线板，其具有在绝缘基材的两侧形成为所需形状的布线层; 以及在所述绝缘基体的一侧上的所述布线层上形成的金属凸块。 然后，准备并堆叠所需数量的单层板。 在这种情况下，准备设置在最上层的板，而不具有金属凸块。 这些板被定位和堆叠，使得相邻板中的一个的金属凸块连接到另一个板的对应的布线层。 此后，将树脂填充到堆叠板之间的间隙中，并且在通过上述步骤获得的多层板的两侧上形成绝缘层，以覆盖除了布线上的预定位置限定的焊盘区域之外的整个表面 层。