公开(公告)号：US09641378B1

公开(公告)日：2017-05-02

申请号：US13797529

申请日：2013-03-12

Applicant: Western Digital Technologies, Inc.

Inventor： David N. Steffen

IPC: G06F12/00 ,  H04L29/06 ,  G06F1/32 ,  G06F3/06 ,  G06F12/0802

CPC classification number: H04L29/0604 ,  G06F1/3203 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0625 ,  G06F3/0638 ,  G06F3/068 ,  G06F9/4418 ,  G06F12/0802 ,  G06F12/0871 ,  G06F2212/1028 ,  G06F2212/1036 ,  G06F2212/313 ,  G06F2212/401 ,  G06F2212/462 ,  Y02D10/13

Abstract: Storing data from a volatile memory of a host in a non-volatile memory (NVM) of a data storage device (DSD). Data from the volatile memory of the host is identified which has been compressed with a first compression ratio. The identified data is decompressed and a second compression ratio is determined based on a time to restore the data to the volatile memory of the host and characteristics of the NVM. At least a portion of the decompressed data is recompressed with the second compression ratio and at least a portion of the recompressed data is stored in the NVM.

公开(公告)号：US20170075832A1

公开(公告)日：2017-03-16

申请号：US15344422

申请日：2016-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Janki S. Bhimani ,  Jingpei Yang ,  Changho Choi ,  Jianjian Huo

IPC: G06F13/18 ,  G06F17/30 ,  G06F12/02

CPC classification number: G06F13/18 ,  G06F3/0611 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0688 ,  G06F12/0246 ,  G06F17/30353 ,  G06F2212/1016 ,  G06F2212/1036 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7205 ,  G06N3/00

Abstract: A multi-streaming memory system includes a memory, and a processor coupled to the memory, the processor executing a software component that is configured to identify multiple attributes that are each related to logical block addresses (LBAs), and that each correspond to each of a plurality of streams of data writes, evaluate an importance factor for each of the attributes for each of the streams, and clustering two or more of the LBAs by assigning a stream ID to each of the LBAs based on all of the importance factors for each of the LBAs and the assigned stream.

Abstract translation: 多流存储器系统包括存储器和耦合到存储器的处理器，处理器执行软件组件，其被配置为识别每个与逻辑块地址（LBA）相关的多个属性，并且每个对应于 多个数据流写入，评估每个流的每个属性的重要性因子，并且通过基于每个LBA的所有重要性因子为每个LBA分配流ID来聚类两个或更多个LBA 的LBA和分配的流。

公开(公告)号：US20170075805A1

公开(公告)日：2017-03-16

申请号：US14850447

申请日：2015-09-10

Applicant: HoneycombData Inc.

Inventor： Xiangyong Ouyang ,  Jongman Yoon ,  Sushma Devendrappa

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/1036 ,  G06F2212/214 ,  G06F2212/7205 ,  G06F2212/7211

Abstract: A storage device, such as a NAND flash device, includes a controller that maintains a temperature for a plurality of data blocks, the temperature calculated according to a function that increases with a number of valid data objects in the block and recency with which the valid data objects have been accessed. Blocks with the lowest temperature are selected for garbage collection. Recency for a block is determined based on a number of valid data objects stored in the block that are referenced in a hot list of a LRU list. During garbage collection, data objects that are least recently used are invalidated to reduce write amplification.

Abstract translation: 诸如NAND闪存装置的存储装置包括一个控制器，该控制器维持多个数据块的温度，该温度是根据随块中有效数据对象数量增加的函数而计算出的温度以及有效 数据对象已被访问。 选择具有最低温度的块用于垃圾收集。 基于在LRU列表的热列表中引用的块中存储的有效数据对象的数量来确定块的新近度。 在垃圾收集期间，最近使用的数据对象无效，以减少写入放大。

公开(公告)号：US20170075583A1

公开(公告)日：2017-03-16

申请号：US15141743

申请日：2016-04-28

Applicant: Microsoft Technology Licensing, LLC.

Inventor： Robin Alexander ,  Lee Edward Prewitt ,  William R. Tipton ,  Laura Marie Caulfield

IPC: G06F3/06 ,  G06F12/10 ,  G11C16/14 ,  G11C16/10 ,  G11C16/26

CPC classification number: G06F3/0605 ,  G06F3/061 ,  G06F3/0614 ,  G06F3/0616 ,  G06F3/0632 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0643 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0685 ,  G06F12/10 ,  G06F2212/1016 ,  G06F2212/1036 ,  G11B20/1217 ,  G11B2020/1238 ,  G11B2020/1292 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26

Abstract: An improved interface for managing disparate read, write, and erase sizes and operations in data storage devices is provided. By improving an interface between a storage system driver layer and associated storage devices, performance of data storage is improved, including improving data storage speed and storage media endurance. Storage media management operations are made more efficient and consistent by providing improved types and sequences of commands sent from the driver layer to the device control layer such that data write operations are performed in a sequential manner as write commands are directed to portions of data as opposed to buffering individual portions of data followed by a large wholescale write/erase process for the buffered data.

Abstract translation: 提供了一种用于管理数据存储设备中不同的读取，写入和擦除大小和操作的改进的接口。 通过改进存储系统驱动层和相关存储设备之间的接口，提高了数据存储的性能，包括提高数据存储速度和存储介质耐久性。 通过提供从驱动器层发送到设备控制层的改进的类型和顺序的命令，使得存储介质管理操作变得更有效和一致，使得以顺序的方式执行数据写入操作，因为写入命令被定向为相对于数据的部分 以缓冲数据的各个部分，然后缓冲数据的大批量写入/擦除处理。

公开(公告)号：US20170052889A1

公开(公告)日：2017-02-23

申请号：US15193147

申请日：2016-06-27

Applicant: Strato Scale Ltd.

Inventor： Avishay Traeger

IPC: G06F12/08

CPC classification number: G06F12/0804 ,  G06F12/0238 ,  G06F12/0866 ,  G06F12/0868 ,  G06F2212/1036 ,  G06F2212/1041 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/7205 ,  G06F2212/7207

Abstract: A system for data storage includes one or more storage devices, a cache memory, and one or more processors. The processors are configured to store data in the storage devices, to cache part of the stored data in the cache memory, and to apply a background maintenance process to at least some of the data stored in the storage devices, including modifying the background maintenance process depending on the part of the data that is cached in the cache memory.

Abstract translation: 用于数据存储的系统包括一个或多个存储设备，高速缓冲存储器和一个或多个处理器。 处理器被配置为将数据存储在存储设备中，以将存储的数据的一部分缓存在高速缓冲存储器中，并且对存储在存储设备中的至少一些数据应用后台维护过程，包括修改后台维护过程 取决于缓存在缓存中的部分数据。

公开(公告)号：US20170017405A1

公开(公告)日：2017-01-19

申请号：US14799244

申请日：2015-07-14

Applicant: HGST Netherlands B.V.

Inventor： Vyacheslav Anatolyevich DUBEYKO ,  Cyril GUYOT

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0616 ,  G06F3/0643 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205

Abstract: Techniques for improving flash-oriented file system garbage collection are disclosed. In some embodiments, the techniques may be realized as a method for improving garbage collection of a flash-oriented file system comprising classifying data according to a first data type area of a plurality of data type areas, creating, using a host device subsystem, a log for a physical erase block of the flash memory, creating, using the host device subsystem, the plurality of data type areas for the log, and writing the data to the first data type area of the plurality of data type areas based on the classification of the data.

Abstract translation: 公开了用于改进面向闪存的文件系统垃圾收集的技术。 在一些实施例中，可以将技术实现为用于改进面向闪存的文件系统的垃圾收集的方法，包括根据多个数据类型区域的第一数据类型区域对数据进行分类，使用主机设备子系统， 记录闪存的物理擦除块，使用主机设备子系统创建日志的多个数据类型区域，并且基于分类将数据写入多个数据类型区域中的第一数据类型区域 的数据。

公开(公告)号：US09547588B1

公开(公告)日：2017-01-17

申请号：US14481102

申请日：2014-09-09

Applicant: VIOLIN MEMORY INC.

Inventor： Daniel C. Biederman ,  Jon C. R. Bennett

IPC: G06F12/00 ,  G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/1036 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/7204 ,  G06F2212/7211

Abstract: Flash memory is subject to a wear out failure mechanism which may depend on the number of times each cell of the memory is programmed and erased. The higher the programming voltage used, the more rapidly the cell degrades. A system and method for reducing the average programming voltage for data sets is disclosed.

Abstract translation: 闪存存在磨损故障机制，这可能取决于存储器的每个单元被编程和擦除的次数。 使用的编程电压越高，电池降解越快。 公开了用于降低数据集的平均编程电压的系统和方法。

公开(公告)号：US20170010964A1

公开(公告)日：2017-01-12

申请号：US15207175

申请日：2016-07-11

Applicant: Rambus Inc.

Inventor： Trung Diep ,  Eric Linstadt

IPC: G06F12/02 ,  G06F12/126 ,  G06F3/06

CPC classification number: G06F12/0284 ,  G06F3/0616 ,  G06F3/0647 ,  G06F3/0673 ,  G06F12/0246 ,  G06F12/08 ,  G06F12/0891 ,  G06F12/1009 ,  G06F12/126 ,  G06F2212/1036 ,  G06F2212/7211

Abstract: Embodiments are disclosed for replacing one or more pages of a memory to level wear on the memory. In one embodiment, a system includes a page fault handling function and a memory address mapping function. Upon receipt of a page fault, the page fault handling function maps an evicted virtual memory address to a stressed page and maps a stressed virtual memory address to a free page using the memory address mapping function.

Abstract translation: 公开了用于替换存储器的一页或多页的级别磨损的实施例。 在一个实施例中，系统包括页面故障处理功能和存储器地址映射功能。 页面错误处理功能在收到页面错误时，将被驱逐的虚拟内存地址映射到应力页面，并使用存储器地址映射功能将压缩的虚拟内存地址映射到空闲页面。

公开(公告)号：US20160350023A1

公开(公告)日：2016-12-01

申请号：US15106444

申请日：2014-01-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  R. Stanley Williams ,  Gary Gibson

IPC: G06F3/06

CPC classification number: G06F3/0632 ,  G06F3/0604 ,  G06F3/0616 ,  G06F3/0688 ,  G06F12/0238 ,  G06F2212/1036 ,  G11C13/0033 ,  G11C16/20 ,  G11C16/3418 ,  G11C2013/0083

Abstract: A system for re-initializing a memory array is described. The system includes a processor and a memory array communicatively coupled to the processor. The system also includes a memory manager. The memory manager includes an establish module to establish a reference state for the memory array. The reference state includes a number of target resistance values for the memory array. The memory manager includes a write module to write data to the memory array. The memory manager includes a re-initialize module to re-initialize the memory array to the established reference state.

Abstract translation: 描述用于重新初始化存储器阵列的系统。 该系统包括处理器和通信地耦合到处理器的存储器阵列。 该系统还包括一个内存管理器。 存储器管理器包括建立模块以建立存储器阵列的参考状态。 参考状态包括存储器阵列的多个目标电阻值。 存储器管理器包括用于将数据写入存储器阵列的写入模块。 存储器管理器包括重新初始化模块以将存储器阵列重新初始化为已建立的参考状态。

公开(公告)号：US09501400B2

公开(公告)日：2016-11-22

申请号：US14079460

申请日：2013-11-13

Applicant: SanDisk Technologies Inc.

Inventor： Chun Sum Yeung ,  Jian Chen ,  Aaron Lee ,  Abhijeet Manohar ,  Chris Avila ,  Dana Lee ,  Jianmin Huang

IPC: G06F12/02 ,  G11C29/00 ,  G11C16/34

CPC classification number: G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7205 ,  G06F2212/7208 ,  G06F2212/7211 ,  G11C16/349 ,  G11C29/82 ,  G11C29/88

Abstract: In a block-erasable nonvolatile memory array, blocks are categorized as bad blocks, prime blocks, and sub-prime blocks. Sub-prime blocks are identified from their proximity to bad blocks or from testing. Sub-prime blocks are configured for limited operation (e.g. only storing non-critical data, or data copied elsewhere, or using some additional or enhanced redundancy scheme).

Abstract translation: 在块可擦除非易失性存储器阵列中，块被分类为坏块，主块和子块。 小块从其邻近的坏块或测试中识别。 小数块被配置为有限的操作（例如仅存储非关键数据，或其他地方复制的数据，或者使用一些额外的或增强的冗余方案）。