公开(公告)号：US08824150B2

公开(公告)日：2014-09-02

申请号：US13408821

申请日：2012-02-29

Applicant: JungYoul Kang ,  SeongHun Kim

Inventor： JungYoul Kang ,  SeongHun Kim

IPC: H05K5/00 ,  H05K7/00 ,  H05K1/14 ,  H05K1/00 ,  H05K1/18 ,  H01R12/00 ,  H05K1/02 ,  G02F1/133 ,  G02F1/13

CPC classification number: H05K1/0271 ,  G02F1/13 ,  G02F1/133 ,  H05K1/00 ,  H05K1/02 ,  H05K1/0278 ,  H05K1/028 ,  H05K1/0281 ,  H05K2201/0154 ,  H05K2201/058 ,  H05K2201/09681 ,  H05K2201/10128 ,  H05K2201/10136 ,  H05K2201/2009

Abstract: The present disclosure discloses a driving printed circuit board (PCB) for use in a display device. More particularly, a driving printed circuit board improving the bonding by preventing PCB warpage is provided. The rear surface stiffener plate includes polygonal patterns to prevent a PCB warpage of the driving printed circuit board due to different heat shrinkage from that of the board during the surface mounting technology (SMT) process.

Abstract translation: 本公开公开了一种用于显示装置的驱动印刷电路板（PCB）。 更具体地，提供了通过防止PCB翘曲来改善接合的驱动印刷电路板。 后表面加强板包括多边形图案，以防止在表面安装技术（SMT）工艺期间由于与板的热收缩不同而导致驱动印刷电路板的PCB翘曲。

公开(公告)号：US20140216790A1

公开(公告)日：2014-08-07

申请号：US13759106

申请日：2013-02-05

Applicant: David P. Trauernicht ,  John A. Lebens ,  Yongcai Wang

Inventor： David P. Trauernicht ,  John A. Lebens ,  Yongcai Wang

IPC: H05K1/02

CPC classification number: H05K1/0296 ,  G06F3/044 ,  H05K2201/09681

Abstract: A conductive micro-wire structure includes a substrate and a plurality of micro-wires formed on or in the substrate in an intersecting pattern and forming intersection corners. A portion of a first micro-wire is coincident with a portion of a second micro-wire to form a coincident portion such that the coincident portion is non-visually resolvable by the human visual system and the coincident portion has a length greater than the sum of the widths of the first and second micro-wires or has one or more rounded intersection corners.

Abstract translation: 导电微线结构包括基板和以交叉图案形成在基板上或基板上的多条微线，并形成交叉角。 第一微线的一部分与第二微线的一部分重合，以形成重合部分，使得重合部分由人类视觉系统不可视地分辨，并且重合部分具有大于总和的长度 的第一和第二微细线的宽度或具有一个或多个圆角交叉点。

公开(公告)号：US20140216786A1

公开(公告)日：2014-08-07

申请号：US13985623

申请日：2013-07-05

Applicant: NANCHANG O-FILM TECH. CO., LTD.

Inventor： Fei Zhou ,  Yulong Gao ,  Miaoqian Cao ,  Hongwei Kang

IPC: H05K1/02

CPC classification number: H05K1/0296 ,  G06F3/044 ,  G06F2203/04103 ,  H05K3/107 ,  H05K3/1258 ,  H05K2201/0108 ,  H05K2201/09681

Abstract: A lead electrode and a preparation method thereof are provided. The lead electrode includes an inner terminal, a lead, and an outer terminal, which are sequentially connected. The lead includes: an insulating substrate; an adhesive material coated on the insulating substrate, the adhesive material defining a trenched mesh; and a conductive material filled in the trenched mesh, wherein an angle formed by a grid line of the trenched mesh and a demolding direction is from 0° to 90°. Since the angle formed by the grid line and the demolding direction is very small, little adhesive material will be attached to the mold, such that the residues of the adhesive material are prevented.

Abstract translation: 提供引线电极及其制备方法。 引线电极包括依次连接的内部端子，引线和外部端子。 引线包括：绝缘基板; 涂覆在所述绝缘基底上的粘合剂材料，所述粘合剂材料限定沟槽网; 以及填充在所述沟槽网中的导电材料，其中由所述沟槽网格的网格线和脱模方向形成的角度为0°至90°。 由于网格线和脱模方向形成的角度非常小，因此粘合材料几乎不附着在模具上，从而防止了粘合剂材料的残留。

公开(公告)号：US20140216785A1

公开(公告)日：2014-08-07

申请号：US13968905

申请日：2013-08-16

Applicant: NANCHANG O-FILM TECH. CO., LTD.

Inventor： FEI ZHOU ,  MIAOQIAN CAO ,  YULONG GAO ,  YUN FANG

IPC: H05K1/02

CPC classification number: H05K1/0274 ,  H05K3/107 ,  H05K2201/09681

Abstract: A patterned transparent conductive film is disclosed in the present invention, which includes a substrate, a first conductive layer, a second conductive layer, both the conductive layer includes a conductive area and an insulating area, the conductive area includes a metal mesh formed by a plurality of metal lines; the metal mesh is a buried metal mesh with random irregular grids, a probability density of the slope of the metal lines of the first conductive layer close to transverse direction is greater than that close to longitudinal direction, a probability density of the slope of the metal lines of the second conductive layer close to transverse direction is greater than that close to longitudinal direction, the two conductive layers are laminated and insulated in the thickness direction, the laminated metal meshes are evenly distributed, the light transmittance is increased and the conductivity is constant, the moire fringe is eliminated.

Abstract translation: 在本发明中公开了一种图案化的透明导电膜，其包括基板，第一导电层，第二导电层，导电层都包括导电区域和绝缘区域，导电区域包括由 多条金属线; 金属网是具有随机不规则网格的掩埋金属网，第一导电层的金属线的接近横向的斜率的概率密度大于靠近纵向的概率密度，金属的斜率的概率密度 接近横向的第二导电层的线大于靠近纵向方向的两个导电层在厚度方向上被层压和绝缘，层叠的金属网均匀分布，透光率增加并且导电率恒定 ，莫尔条纹被消除。

公开(公告)号：US20140209359A1

公开(公告)日：2014-07-31

申请号：US13751464

申请日：2013-01-28

Applicant: JOHN ANDREW LEBENS ,  David Paul Trauernicht ,  Yongcai Wang ,  Ronald Steven Cok

Inventor： JOHN ANDREW LEBENS ,  David Paul Trauernicht ,  Yongcai Wang ,  Ronald Steven Cok

IPC: H05K1/02

CPC classification number: H05K1/0296 ,  G06F3/044 ,  H05K1/02 ,  H05K1/0289 ,  H05K3/1258 ,  H05K2201/0108 ,  H05K2201/0376 ,  H05K2201/09227 ,  H05K2201/09272 ,  H05K2201/09681 ,  H05K2201/09727 ,  Y10T428/26

Abstract: A conductive micro-wire structure includes a substrate. A plurality of spaced-apart electrically connected micro-wires is formed on or in the substrate forming the conductive micro-wire structure. The conductive micro-wire structure has a transparency of less than 75% and greater than 0%.

Abstract translation: 导电微线结构包括衬底。 多个间隔开的电连接的微线形成在形成导电微线结构的衬底上或衬底中。 导电微线结构具有小于75％且大于0％的透明度。

公开(公告)号：US08791371B2

公开(公告)日：2014-07-29

申请号：US13305482

申请日：2011-11-28

Applicant: Jinwoo Choi

Inventor： Jinwoo Choi

IPC: H05K1/11 ,  H05K1/02

CPC classification number: G06F17/5077 ,  G06F2217/82 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0224 ,  H05K1/0225 ,  H05K3/4629 ,  H05K2201/09681 ,  H01L2924/00

Abstract: An improved multi-layered ceramic package includes a plurality of signal planes, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; and at least one reference mesh plane adjacent to one or more signal planes. The reference mesh plane includes spaced mesh lines that are separated by spaces that alternate in a narrow-wide or wide-narrow pattern. A multi-layered ceramic package using the mesh plane with alternating spaces generates significantly lower far-end (FE) noise in the ceramic package than a conventional mesh plane with constant spaces. The noise is further reduced by placing shield lines on opposite sides of signal lines in the signal plane.

Abstract translation: 一种改进的多层陶瓷封装包括多个信号面，每个具有一个或多个信号线; 多个通孔，每个通孔提供电压（Vdd）电源连接或地（Gnd）连接中的一个; 以及与一个或多个信号平面相邻的至少一个参考网格平面。 参考网格平面包括间隔开的网格线，它们以窄宽或宽窄图案交替的间隔分开。 与具有恒定空间的常规网格平面相比，使用具有交替空间的网格平面的多层陶瓷封装在陶瓷封装中产生明显较低的远端（FE）噪声。 通过将屏蔽线放置在信号平面中的信号线的相对侧上来进一步降低噪声。

公开(公告)号：US08686298B2

公开(公告)日：2014-04-01

申请号：US13403155

申请日：2012-02-23

Applicant: Junichi Nakamura ,  Kotaro Kodani ,  Michiro Ogawa

Inventor： Junichi Nakamura ,  Kotaro Kodani ,  Michiro Ogawa

IPC: H05K1/03

CPC classification number: H01L23/49544 ,  H01L23/49822 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0271 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/4682 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/09781 ,  H05K2201/2009 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.

Abstract translation: 布线基板包括布线形成区域，其中堆叠多个布线层，同时夹着绝缘层;外周区域布置在布线形成区域周围，并且其中加强图案形成在与每个布线形成区域相同的层中 接线层。 增强图案与外周区域的面积比和布线层与布线形成区域的面积比在各层中基本相同，并且当外围区域中没有间隙时，增强图案在外周区域中不存在间隙 接线板以平面视角观看。

公开(公告)号：US20140076607A1

公开(公告)日：2014-03-20

申请号：US14084305

申请日：2013-11-19

Applicant: Apple Inc.

Inventor： John M. Brock ,  Brett William Degner ,  Dinesh C. Mathew ,  Thomas W. Wilson, JR. ,  Chris Ligtenberg ,  Keith J. Hendren ,  Stever D. Keiper ,  Eugene Y. Kim

IPC: H01B11/00 ,  H01B13/00

CPC classification number: H01B11/00 ,  H01B13/00 ,  H01R12/592 ,  H01R12/62 ,  H01R13/5213 ,  H05K1/0218 ,  H05K1/0224 ,  H05K1/0393 ,  H05K2201/09618 ,  H05K2201/09681 ,  Y10T29/49117 ,  Y10T29/5313

Abstract: A multi-layered cable consisting of three or more conductive layers separated by layers of dielectric and/or adhesive material. The bottom layer and the top layer may act as return path for the transmitted signals and as a shield to prevent interference between these and external electrical signals. Located between the bottom layer and the top layer, the middle layer may transmit desired signals through the flexible cable. The material selection and specifics of each of the layers should be selected so as to achieve a balance in which the desired electrical impedance and mechanical flexibility requirements are met. The cable may also include one or more vias connecting the bottom layer to the top layer, providing shielding all the way around the flex cable. An additional conductive sock may be used to improve shielding effectiveness of the top and bottom layer and to connect to I/O connector shells and the system Faraday cage.

Abstract translation: 由三层或更多层由电介质和/或粘合材料层隔开的导电层组成的多层电缆。 底层和顶层可以作为传输信号的返回路径和屏蔽，以防止这些和外部电信号之间的干扰。 位于底层和顶层之间，中间层可通过柔性电缆传送所需信号。 应选择每个层的材料选择和细节，以达到满足期望的电阻抗和机械柔性要求的平衡。 电缆还可以包括将底层连接到顶层的一个或多个通孔，围绕柔性电缆提供屏蔽。 可以使用额外的导电袜子来提高顶层和底层的屏蔽效能，并连接到I / O连接器外壳和系统法拉第笼。

公开(公告)号：US20140041216A1

公开(公告)日：2014-02-13

申请号：US13571738

申请日：2012-08-10

Applicant: Ronald Steven Cok

Inventor： Ronald Steven Cok

IPC: H05K3/02

CPC classification number: G06F3/044 ,  G06F2203/04103 ,  H05K1/0287 ,  H05K1/162 ,  H05K2201/0108 ,  H05K2201/09672 ,  H05K2201/09681 ,  Y10T29/49105 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155

Abstract: A method of making a touch-responsive capacitive device includes providing a transparent substrate and forming anisotropically conductive first and second electrodes extending in corresponding first and second orthogonal length directions over the substrate. Anisotropically conductive first and second electrodes each with electrically connected micro-wires are formed on opposing sides of the transparent substrate. The anisotropically conductive first and second electrodes extend in corresponding first and second length directions. The first and second micro-wires are formed with substantially parallel straight micro-wires extending substantially in the corresponding first and second length directions and a plurality of angled micro-wires are formed at a non-orthogonal angle to the straight micro-wires and electrically connect the straight micro-wires so that the anisotropically conductive first and second electrodes have a greater electrical conductivity in the corresponding first and second length directions than in another anisotropically conductive electrode direction.

Abstract translation: 一种制作触摸响应电容性装置的方法包括提供透明基板并形成各向异性导电的第一和第二电极，其在相应的第一和第二正交长度方向上延伸穿过基板。 各向异性导电的第一和第二电极各自具有电连接的微线形成在透明基板的相对侧上。 各向异性导电的第一和第二电极在相应的第一和第二长度方向上延伸。 第一和第二微线形成有基本上平行的直线微线，其基本上在相应的第一和第二长度方向上延伸，并且多个成角度的微细线以直线微线形成非正交角并且电 连接直的微线，使得各向异性导电的第一和第二电极在相应的第一和第二长度方向上比在另一个各向异性导电电极方向上具有更大的导电性。

公开(公告)号：US08645889B2

公开(公告)日：2014-02-04

申请号：US13449732

申请日：2012-04-18

Applicant: Jinwoo Choi ,  Sungjun Chun ,  Anand Haridass ,  Roger Weekly

Inventor： Jinwoo Choi ,  Sungjun Chun ,  Anand Haridass ,  Roger Weekly

IPC: G06F17/50 ,  H05K1/00

CPC classification number: G06F17/5068 ,  G06F17/5036 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K1/0224 ,  H05K3/4629 ,  H05K2201/09236 ,  H05K2201/09681 ,  H01L2924/00

Abstract: A method reduces coupling noise and controls impedance discontinuity in ceramic packages by: providing at least one reference mesh layer; providing a plurality of signal trace layers, with each signal layer having one or more signal lines and the reference mesh layer being adjacent to one or more of the signal layers; disposing a plurality of vias through the at least one reference mesh layer, with each via providing a voltage (Vdd) power connection or a ground (Gnd) connection; selectively placing via-connected coplanar-type shield (VCS) lines relative to the signal lines, with a first VCS line extended along a first side of a first signal line and a second VCS line extended along a second, opposing side of said first signal line. Each of the VCS lines interconnect with and extend past one or more vias located within a directional path along which the VCS lines extends.

Abstract translation: 一种方法通过以下方式减少耦合噪声并控制陶瓷封装中的阻抗不连续性：提供至少一个参考网格层; 提供多个信号迹线层，其中每个信号层具有一个或多个信号线，并且所述参考网格层与所述信号层中的一个或多个相邻; 通过所述至少一个参考网格层布置多个通孔，其中每个通孔提供电压（Vdd）电源连接或接地（Gnd）连接; 选择性地将通过连接的共面型屏蔽（VCS）线相对于信号线放置，其中第一VCS线沿着第一信号线的第一侧延伸，并且第二VCS线沿着所述第一信号的第二相对侧延伸 线。 VCS线路中的每一条与位于VCS线延伸的定向路径内的一个或多个通孔相互连接并延伸。