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公开(公告)号：US10523155B2
公开(公告)日：2019-12-31
申请号：US15987398
申请日：2018-05-23
Applicant: Microchip Technology Incorporated
Inventor： Rajan Vijayaraghavan , Ajay Kumar , Kiran Karnik
Abstract: Low voltage crystal oscillator having native NMOS transistors used for coupling/decoupling to/from GPIO. The native NMOS transistors function properly at a low supply voltage when on (low resistance) and a high supply voltage when off (high resistance). Oscillator Gm driver bias resistors are repurposed to degenerate the native NMOS transistors when they are off, thereby reducing the leakage current thereof (oscillator circuit decoupled from GPIO nodes). This ensures compliance with the CMOS IIH leakage current specification during an external clock (EC) mode at a high supply voltage.
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公开(公告)号：US10483984B2
公开(公告)日：2019-11-19
申请号：US15803026
申请日：2017-11-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangdon Jung , Dokyung Lim , Wooseok Kim
Abstract: A temperature compensated oscillation controller includes a temperature compensation circuit configured to provide a reference voltage through a first terminal and to receive an input voltage including temperature information through a second terminal, and an oscillation circuit configured to be connected to an external crystal resonator through third and fourth terminals and to output a clock signal in response to an oscillation signal from the external crystal resonator. The temperature compensation circuit is configured to perform a voltage controlled oscillator-based sensing operation to convert the input voltage into a temperature code and to adjust a frequency of the clock signal using the temperature code.
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公开(公告)号：US10476508B2
公开(公告)日：2019-11-12
申请号：US15631857
申请日：2017-06-23
Applicant: SEIKO EPSON CORPORATION
Inventor： Manabu Kondo
Abstract: An oscillator includes a first package, an oscillation element housed in the first package, a first temperature controller housed in the first package, a second package adapted to house the first package, and a second temperature controller disposed outside the first package, and housed in the second package.
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公开(公告)号：US10469089B2
公开(公告)日：2019-11-05
申请号：US15814951
申请日：2017-11-16
Applicant: Seiko Epson Corporation
Inventor： Takehiro Yamamoto , Masayuki Ishikawa
Abstract: An oscillation circuit includes an amplification circuit that causes a resonator to oscillate, and a variable capacitance circuit whose capacitance value is controlled on the basis of a control voltage. The variable capacitance circuit includes a first variable capacitive element in which an inflection point voltage in a change characteristic of a capacitance value for the control voltage is a first voltage, and a second variable capacitive element in which an inflection point voltage in a change characteristic of a capacitance value for the control voltage is a second voltage which is different from the first voltage. A capacitance value of the first variable capacitive element when the control voltage is the first voltage is different from a capacitance value of the second variable capacitive element when the control voltage is the second voltage.
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公开(公告)号：US10394273B2
公开(公告)日：2019-08-27
申请号：US15725713
申请日：2017-10-05
Applicant: Seiko Epson Corporation
Inventor： Takehiro Yamamoto
Abstract: A circuit device includes an oscillation circuit, a clock signal output circuit that outputs a clock signal based on an output signal from the oscillation circuit, and an output control circuit. The output control circuit includes a counter circuit that performs a counting process on the basis of the output signal from the oscillation circuit, and a count enable signal generation circuit that outputs a count enable signal for the counter circuit. The counter circuit starts the counting process when the count enable signal becomes active, and outputs an output enable signal for the clock signal to the clock signal output circuit on the basis of a result of the counting process.
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Patent Agency Ranking
公开(公告)号：US20190246367A1
公开(公告)日：2019-08-08
申请号：US16318111
申请日：2016-07-22
Inventor： Xavier VILAJOSANA GUILLÉN , Borja MARTÍNEZ HUERTA , Ferran ADELANTADO FREIXER , Pere TUSET PEIRÓ
CPC classification number: H04W56/0015 , G06F1/12 , H03J3/04 , H03L1/02
Abstract: Methods and devices for synchronizing a device clock in a wireless network (e.g. a LPWAN) are disclosed. Example methods comprise identifying a device temperature, identifying a clock drift associated with the identified device temperature and applying a correction to the device clock based on the identified drift. For the identified device temperature, the drift is identified by comparing the confidence of the drift value in a pre-calibration curve generated from fixed drift values in a pre-calibration table with the confidence of the drift value in a learning curve generated from variable drift values in a learning table and selecting the drift value from the curve having the higher drift confidence.
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公开(公告)号：US20190238139A1
公开(公告)日：2019-08-01
申请号：US16257350
申请日：2019-01-25
Applicant: Seiko Epson Corporation
Inventor： Hideo HANEDA , Yasuhiro SUDO
CPC classification number: H03L1/04 , G06N3/04 , G06N3/08 , H03B5/04 , H03B5/32 , H03L1/023 , H03M1/12
Abstract: An integrated circuit device includes first and second temperature sensors, an A/D conversion circuit that performs A/D conversion on first and second temperature detection voltages from the first and second temperature sensors and outputs first and second temperature detection data, a connection terminal that is electrically connected to a temperature detection target device of the first and second temperature sensors, and a digital signal processing circuit that performs digital calculation based on the first and second temperature detection data and performs a temperature compensation process of correcting temperature characteristics of the temperature detection target device.
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公开(公告)号：US20190207622A1
公开(公告)日：2019-07-04
申请号：US16227494
申请日：2018-12-20
Applicant: Seiko Epson Corporation
Inventor： Atsushi TANAKA
Abstract: A circuit device includes a selector to which first to n-th voltages are input, an A/D converter circuit to which output voltages of the selector are input as input voltages, and first to n-th quantization error hold circuits that hold charges corresponding to quantization errors in A/D conversion of the first to n-th voltages. The A/D converter circuit performs A/D conversion of an input voltage by a successive approximation operation using a charge redistribution type D/A converter circuit and performs k-th A/D conversion on an i-th voltage by using a charge held in an i-th quantization error hold circuit in (k−1)th A/D conversion of the i-th voltage to output A/D conversion result data DOUT in which the quantization error is noise-shaped.
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公开(公告)号：US20190173427A1
公开(公告)日：2019-06-06
申请号：US16207751
申请日：2018-12-03
Inventor： Benoit MARCHAND , Francois DRUILHE
Abstract: A quartz crystal resonator is coupled to an electronic circuit. A capacitive or resistive element is provided for adjusting a frequency of the quartz crystal resonator on activation or deactivation of a function of a circuit. Control is made according to a model of an expected variation of a temperature of the quartz crystal resonator.
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公开(公告)号：US10291234B2
公开(公告)日：2019-05-14
申请号：US15386494
申请日：2016-12-21
Applicant: SEIKO EPSON CORPORATION
Inventor： Takemi Yonezawa
Abstract: A circuit device includes a processor adapted to perform a signal processing of temperature compensation of an oscillation frequency based on temperature detection data from an external temperature sensor disposed outside the circuit device to output frequency control data, and an oscillation signal generation circuit adapted to generate an oscillation signal with the oscillation frequency corresponding to the frequency control data using the frequency control data and a resonator disposed in a thermostatic oven.
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