公开(公告)号：US20180261686A1

公开(公告)日：2018-09-13

申请号：US15918528

申请日：2018-03-12

Applicant: Applied Materials, Inc.

Inventor： Samkuei Lin ,  Ajay Bhatnagar ,  Nitin Ingle

IPC: H01L29/66 ,  H01L21/3065 ,  H01L21/768 ,  H01L29/786

CPC classification number: H01L29/66742 ,  H01J2237/3345 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/76897 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/78696 ,  Y02P80/30

Abstract: Processing methods may be performed to form a sidewall spacer on a semiconductor substrate. The methods may include laterally etching a first silicon-containing material relative to a second silicon-containing material. The first silicon-containing material and the second silicon-containing material may be disposed vertically from one another. The first silicon-containing material may also be positioned vertically between two regions of the second silicon-containing material. The methods may also include forming a spacer within a recess defined by the lateral etching between the two regions of the second silicon-containing material. The methods may further include forming a contact material adjacent to and contacting both the second silicon-containing material and the spacer.

公开(公告)号：US10043674B1

公开(公告)日：2018-08-07

申请号：US15669362

申请日：2017-08-04

Applicant: Applied Materials, Inc.

Inventor： Mikhail Korolik ,  Nitin Ingle ,  Dimitri Kioussis

IPC: H01L21/3065 ,  H01L21/306

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32477

Abstract: Exemplary methods for etching a germanium-containing material may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a semiconductor processing chamber. The methods may include flowing effluents of the fluorine-containing precursor through apertures defined in a chamber component. The apertures may be coated with a catalytic material. The methods may include reducing a concentration of fluorine radicals in the plasma effluents with the catalytic material. The methods may also include delivering the plasma effluents to a processing region of the semiconductor processing chamber. A substrate having an exposed region of a germanium-containing material may be housed within the processing region. The methods may further include etching the germanium-containing material.

公开(公告)号：US10026621B2

公开(公告)日：2018-07-17

申请号：US15350803

申请日：2016-11-14

Applicant: Applied Materials, Inc.

Inventor： Jungmin Ko ,  Tom Choi ,  Nitin Ingle ,  Kwang-Soo Kim ,  Theodore Wou

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3115

Abstract: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon nitride surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon nitride. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon nitride from the semiconductor substrate.

公开(公告)号：US08986557B2

公开(公告)日：2015-03-24

申请号：US14177893

申请日：2014-02-11

Applicant: Applied Materials, Inc.

Inventor： Brian Saxton Underwood ,  Abhijit Basu Mallick ,  Nitin Ingle ,  Roman Gouk ,  Steven Verhaverbeke

IPC: B44C1/22 ,  G11B5/85 ,  G11B5/855

CPC classification number: G11B5/85 ,  G11B5/855

Abstract: Method and apparatus for forming a patterned magnetic substrate are provided. A patterned resist is formed on a magnetically active surface of a substrate. An oxide layer is formed over the patterned resist by a flowable CVD process. The oxide layer is etched to expose portions of the patterned resist. The patterned resist is then etched, using the etched oxide layer as a mask, to expose portions of the magnetically active surface. A magnetic property of the exposed portions of the magnetically active surface is then modified by directing energy through the etched resist layer and the etched oxide layer, which are subsequently removed from the substrate.

Abstract translation: 提供了用于形成图案化磁性基底的方法和装置。 在基板的磁性活性表面上形成图案化的抗蚀剂。 通过可流动的CVD工艺在图案化的抗蚀剂上形成氧化物层。 蚀刻氧化物层以暴露图案化抗蚀剂的部分。 然后使用蚀刻的氧化物层作为掩模蚀刻图案化的抗蚀剂，以暴露磁性活性表面的部分。 然后通过将能量引导通过经蚀刻的抗蚀剂层和经蚀刻的氧化物层（随后从衬底去除）来改变磁性活性表面的暴露部分的磁性。

公开(公告)号：US08927390B2

公开(公告)日：2015-01-06

申请号：US13624724

申请日：2012-09-21

Applicant: Applied Materials, Inc.

Inventor： Kedar Sapre ,  Nitin Ingle ,  Jing Tang

IPC: H01L21/76 ,  H01L21/762

CPC classification number: H01L21/3065 ,  H01L21/3081 ,  H01L21/76224

Abstract: A method of etching a recess in a semiconductor substrate is described. The method may include forming a dielectric liner layer in a trench of the substrate where the liner layer has a first density. The method may also include depositing a second dielectric layer at least partially in the trench on the liner layer. The second dielectric layer may initially be flowable following the deposition, and have a second density that is less than the first density of the liner. The method may further include exposing the substrate to a dry etchant, where the etchant removes a portion of the first liner layer and the second dielectric layer to form a recess, where the dry etchant includes a fluorine-containing compound and molecular hydrogen, and where the etch rate ratio for removing the first dielectric liner layer to removing the second dielectric layer is about 1:1.2 to about 1:1.

Abstract translation: 描述了蚀刻半导体衬底中的凹部的方法。 该方法可以包括在衬底的沟槽中形成介质衬垫层，其中衬层具有第一密度。 该方法还可以包括至少部分地在衬垫层上的沟槽中沉积第二电介质层。 第二电介质层可以首先在沉积之后流动，并且具有小于衬垫的第一密度的第二密度。 该方法可以进一步包括将衬底暴露于干燥蚀刻剂，其中蚀刻剂去除第一衬里层和第二介电层的一部分以形成凹部，其中干蚀刻剂包括含氟化合物和分子氢，并且其中 用于去除第一介电衬垫层以去除第二介电层的蚀刻速率比为约1:1.2至约1:1。