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    SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    4.
    发明申请
    SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    基板加工装置及制造半导体装置的方法

    公开(公告)号：US20160211151A1

    公开(公告)日：2016-07-21

    申请号：US15005981

    申请日：2013-07-26

    Applicant: HITACHI KOKUSAI ELECTRIC INC.

    Inventor： Yasutoshi TSUBOTA ,  Yuichi WADA ,  Kenji KAMEDA ,  Shin HIYAMA

    IPC: H01L21/3213 ,  H01J37/32 ,  H01L21/67

    CPC classification number: H01L21/32135 ,  H01J37/32449 ,  H01J37/32724 ,  H01J37/32834 ,  H01J2237/334 ,  H01J2237/3345 ,  H01J2237/3346 ,  H01L21/67069 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/67253 ,  H01L27/10852

    Abstract: Etching having high selectivity is performed within a plane of a substrate. To this end, a substrate processing apparatus includes a substrate support where a substrate including a first film containing at least silicon and a second film having a silicon content ratio lower than that of the first film is placed; a process chamber wherein the substrate support is disposed; a gas supply system configured to supply an etching gas to the substrate; a coolant channel disposed in the substrate support and having a coolant flowing therein; a coolant flow rate controller configured to control a flow rate of the coolant supplied to the coolant channel; a control unit configured to control at least the coolant flow rate controller such that a temperature of the substrate is maintained whereat an etch rate of the first film is higher than that of the second film while the etching gas is in contact with the substrate; and an exhaust system configured to exhaust an inner atmosphere of the process chamber.

    Abstract translation: 在基板的平面内进行具有高选择性的蚀刻。 为此，衬底处理设备包括：衬底支撑体，其中放置包括至少含有硅的第一膜的衬底和具有低于第一膜的硅含量比的第二膜; 处理室，其中设置所述衬底支撑件; 气体供给系统，其构造成向所述基板供给蚀刻气体; 冷却剂通道，其设置在所述基板支撑件中并且具有在其中流动的冷却剂; 冷却剂流量控制器，被配置为控制供应到冷却剂通道的冷却剂的流量; 控制单元，被配置为至少控制所述冷却剂流量控制器，使得在所述蚀刻气体与所述基板接触的同时保持所述第一膜的蚀刻速率高于所述第二膜的蚀刻速率的基板的温度; 以及构造成排出处理室的内部气氛的排气系统。

    ION BEAM PROCESSING METHOD AND ION BEAM PROCESSING APPARATUS
    5.
    发明申请
    ION BEAM PROCESSING METHOD AND ION BEAM PROCESSING APPARATUS 有权
    离子束处理方法和离子束处理装置

    公开(公告)号：US20150090583A1

    公开(公告)日：2015-04-02

    申请号：US14563401

    申请日：2014-12-08

    Applicant: CANON ANELVA CORPORATION

    Inventor： YOSHIMITSU KODAIRA ,  ISAO TAKEUCHI ,  MIHOKO NAKAMURA

    IPC: H01J37/305 ,  H01J37/32

    CPC classification number: H01J37/3056 ,  H01J37/32357 ,  H01J2237/3345 ,  H01J2237/3347 ,  H01L21/68764 ,  H01L23/544 ,  H01L43/12 ,  H01L2223/54426 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present invention has an objective to provide a processing method and an ion beam processing apparatus capable of inhibiting deposition of redeposited films even for fine patterns. In an embodiment of the present invention, ion beam processing is performed such that an etching amount of an ion beam incident in extending directions of pattern trenches formed on a substrate is made larger than the etching amount of the ion beam incident in other directions. This processing enables fine patterns to be processed while inhibiting redeposited films from being deposited on the bottom portions of the trenches of the fine patterns.

    Abstract translation: 本发明的目的是提供即使对于精细图案也能够抑制再沉积膜的沉积的处理方法和离子束处理装置。 在本发明的一个实施例中，进行离子束处理使得在基板上形成的图形沟槽的延伸方向上入射的离子束的蚀刻量大于沿其它方向入射的离子束的蚀刻量。 该处理使得能够处理精细图案，同时抑制再沉积的膜沉积在精细图案的沟槽的底部上。

    ENHANCED ETCH AND DEPOSITION PROFILE CONTROL USING PLASMA SHEATH ENGINEERING
    7.
    发明申请
    ENHANCED ETCH AND DEPOSITION PROFILE CONTROL USING PLASMA SHEATH ENGINEERING 有权
    使用等离子体工程的增强蚀刻和沉积型材控制

    公开(公告)号：US20140034611A1

    公开(公告)日：2014-02-06

    申请号：US14055121

    申请日：2013-10-16

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.

    Inventor： Ludovic Godet ,  Timothy Miller ,  George Papasouliotis ,  Vikram Singh

    IPC: B44C1/22

    CPC classification number: B44C1/227 ,  C23C16/045 ,  C23C16/50 ,  H01J37/32412 ,  H01J37/32623 ,  H01J2237/3344 ,  H01J2237/3345

    Abstract: A plasma processing tool is used to deposit material on a workpiece. For example, a method for conformal deposition of material is disclosed. In this embodiment, the plasma sheath shape is modified to allow material to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of different features can be deposited onto. In another embodiment, a plasma processing tool is used to etch a workpiece. In this embodiment, the plasma sheath shape is altered to allow ions to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of differently shaped features can be created.

    Abstract translation: 使用等离子体处理工具将材料沉积在工件上。 例如，公开了一种用于材料的共形沉积的方法。 在该实施例中，等离子体护套形状被修改以允许材料在入射角的范围内冲击工件。 通过随时间改变入射角的这个范围，可以沉积各种不同的特征。 在另一个实施例中，使用等离子体处理工具来蚀刻工件。 在该实施例中，等离子体鞘形状被改变以允许离子在入射角的范围内冲击工件。 通过随时间改变入射角的这个范围，可以产生各种不同形状的特征。

    ETCHING METHODS AND APPARATUS AND SUBSTRATE ASSEMBLIES PRODUCED THEREWITH
    8.
    发明申请
    ETCHING METHODS AND APPARATUS AND SUBSTRATE ASSEMBLIES PRODUCED THEREWITH 审中-公开
    蚀刻方法和装置以及生产的基板组件

    公开(公告)号：US20070077724A1

    公开(公告)日：2007-04-05

    申请号：US11469010

    申请日：2006-08-31

    Applicant: Kevin Donohoe ,  Rich Stocks

    Inventor： Kevin Donohoe ,  Rich Stocks

    IPC: H01L21/76

    CPC classification number: H01J37/321 ,  H01J2237/3345 ,  H01J2237/3347 ,  H01L21/3085 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/76232 ,  Y10S428/901 ,  Y10T428/24479 ,  Y10T428/2457

    Abstract: Methods and apparatus for etching substrates such as silicon wafers are provided. In one specific approach, a surface of the substrate assembly is covered with a resist that is patterned to define features to be etched. In this approach, the surface is then exposed to a plasma in a plasma etcher so that surface areas not covered with the resist are etched, while the thickness of the resist increases or etches at a rate that is at least ten times slower than that of the exposed areas of the surface. This etching process can be followed with a conventional plasma etch. By combining the etching that increases the resist thickness with the conventional etching of resist in which the resist thins during etching, features having high-aspect-ratios can be etched.

    Abstract translation: 提供了用于蚀刻诸如硅晶片的基板的方法和装置。 在一种具体方法中，衬底组件的表面被图案化的抗蚀剂覆盖以限定待蚀刻的特征。 在这种方法中，然后将表面暴露于等离子体蚀刻器中的等离子体，使得未被抗蚀剂覆盖的表面区域被蚀刻，同时抗蚀剂的厚度增加或蚀刻速率至少比 表面的暴露区域。 该蚀刻工艺可以用常规等离子体蚀刻来进行。 通过将蚀刻加强抗蚀剂厚度的蚀刻与蚀刻时的抗蚀剂凹陷的抗蚀剂的常规蚀刻相结合，可以蚀刻具有高纵横比的特征。

    Pulsed plasma processing of semiconductor substrates
    10.
    发明授权
    Pulsed plasma processing of semiconductor substrates 有权
    半导体衬底脉冲等离子体处理

    公开(公告)号：US06794301B2

    公开(公告)日：2004-09-21

    申请号：US10053138

    申请日：2002-01-18

    Applicant: Stephen E. Savas

    Inventor： Stephen E. Savas

    IPC: H01L2100

    CPC classification number: H01J37/321 ,  H01J37/32082 ,  H01J37/32706 ,  H01J2237/004 ,  H01J2237/3345

    Abstract: Apparatus and methods for an improved plasma processing. A first power source alternates between high and low power cycles to produce and sustain a plasma, and a second power source alternates between high and low power cycles to accelerate ions toward the substrate being processed. Preferably, the power sources are synchronized such that the second power provides each high power cycle substantially during the time that the first power source provides each low power cycle. Commencement of each high power cycle provided by the second power source may be delayed for a period of time after each high power cycle provided by the first power source terminates. This approach allows electrons to cool off and accumulated charge on surface features of the substrate to dissipate before ions are accelerated toward the substrate for processing. The power sources may also be synchronized such that the both power sources are in a high power state during initial plasma power up to facilitate coupling power to the plasma and reduce problems associated with impedance mismatch between the plasma and the first power source.

    Abstract translation: 改进等离子体处理的装置和方法。 第一电源在高功率和低功率周期之间交替以产生和维持等离子体，并且第二电源在高功率和低功率循环之间交替，以将离子加速朝向被处理的衬底。 优选地，电源被同步，使得第二功率在第一电源提供每个低功率周期的时间期间基本上提供每个高功率周期。 在由第一电源提供的每个高功率周期终止之后，由第二电源提供的每个高功率周期的开始可以被延迟一段时间。 这种方法允许电子冷却并且在离子被加速朝向衬底加工之前在衬底的表面特征上积累电荷以消散。 电源也可以被同步，使得两个电源在初始等离子体上电期间处于高功率状态以便于将功率耦合到等离子体并且减少与等离子体和第一电源之间的阻抗失配相关的问题。

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