公开(公告)号：US12009042B2

公开(公告)日：2024-06-11

申请号：US17980234

申请日：2022-11-03

Applicant: Micron Technology, Inc.

Inventor： Vamsi Pavan Rayaprolu ,  Kishore Kumar Muchherla ,  Ashutosh Malshe ,  Gianni S. Alsasua ,  Harish R. Singidi

IPC: G06F11/07 ,  G06F11/30 ,  G06F12/02 ,  G06F12/0882 ,  G11C29/10 ,  G11C29/42 ,  G11C29/44

CPC classification number: G11C29/42 ,  G06F11/076 ,  G06F11/3037 ,  G06F12/0246 ,  G06F12/0882 ,  G11C29/10 ,  G11C29/44

Abstract: A trigger rate associated with a scan operation of a set of memory pages of a data block is identified. The trigger rate is compared to a threshold rate to determine that a condition is satisfied. In response to satisfying the condition, a refresh operation is executed on the set of memory pages of the data block.

公开(公告)号：US11978514B2

公开(公告)日：2024-05-07

申请号：US17361259

申请日：2021-06-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Vamsi Pavan Rayaprolu ,  Kishore Kumar Muchherla ,  Harish R. Singidi ,  Ashutosh Malshe

IPC: G11C16/14 ,  G11C11/56 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/14 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5671 ,  G11C16/10 ,  G11C16/349 ,  G11C2211/5644

Abstract: An indication to perform a write operation at a memory component can be received. A voltage pulse can be applied to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state. An erase operation for the destination block can be performed to change the voltage state of the memory cell from the programmed state to a second voltage state associated with an erased state. A write operation can be performed to write the data to the destination block upon changing the voltage state of the memory cell to the second voltage state.

公开(公告)号：US11972130B2

公开(公告)日：2024-04-30

申请号：US17981649

申请日：2022-11-07

Applicant: Micron Technology, Inc.

Inventor： Ashutosh Malshe ,  Vamsi Pavan Rayaprolu ,  Kishore K. Muchherla

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0679

Abstract: A method includes determining that a ratio of valid data portions of a block of memory cells is greater than or less than a valid data portion threshold and performing a first media management operation on the block of memory cells in response to determining that the ratio of valid data portions is greater than the valid data portion threshold. The method further includes performing a second media management operation on the block of memory cells in response to determining that the ratio of valid data portions is less than the valid data portion threshold.

公开(公告)号：US20240126690A1

公开(公告)日：2024-04-18

申请号：US18395363

申请日：2023-12-22

Applicant: Micron Technology, Inc.

Inventor： Kishore Kumar Muchherla ,  Peter Feeley ,  Ashutosh Malshe ,  Daniel J. Hubbard ,  Christopher S. Hale ,  Kevin R. Brandt ,  Sampath K. Ratnam ,  Yun Li ,  Marc S. Hamilton

IPC: G06F12/02 ,  G06F3/06 ,  G06F12/00 ,  G06F12/06 ,  G06F12/0891

CPC classification number: G06F12/0253 ,  G06F3/0629 ,  G06F3/0634 ,  G06F3/064 ,  G06F3/0688 ,  G06F3/0689 ,  G06F12/00 ,  G06F12/0646 ,  G06F12/0891 ,  G11C11/5621

Abstract: A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: designate a storage mode for a target set of memory cells based on valid data in a source block, wherein the target set of memory cells are configured with a capacity to store up to a maximum number of bits per cell, and the storage mode is for dynamically configuring the target set of memory cells in as cache memory that stores a number of bits less per cell than the corresponding maximum capacity.

公开(公告)号：US11941285B2

公开(公告)日：2024-03-26

申请号：US17235216

申请日：2021-04-20

Applicant: Micron Technology, Inc.

Inventor： Vamsi Pavan Rayaprolu ,  Kishore Kumar Muchherla ,  Ashutosh Malshe ,  Giuseppina Puzzilli ,  Saeed Sharifi Tehrani

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, receiving a read request to perform a read operation on a block of the memory device; determining whether an entry corresponding to the block is stored in a data structure associated with the memory device; responsive to the entry being stored in the data structure, incrementing a counter associated with the block to track a number of read operations performed on the block of the memory device; resetting a timer associated with the block to an initial value, wherein the timer is to track a period of time that elapses since the read operation was performed on the block of the memory device; determining that the counter and the timer satisfy a first criterion; and responsive to determining that the counter and the timer satisfy the first criterion, removing the entry corresponding to the block from the data structure associated with the memory device.

公开(公告)号：US11914490B2

公开(公告)日：2024-02-27

申请号：US17492220

申请日：2021-10-01

Applicant: Micron Technology, Inc.

Inventor： Harish Reddy Singidi ,  Vamsi Pavan Rayaprolu ,  Kishore Kumar Muchherla ,  Jianmin Huang ,  Xiangang Luo ,  Ashutosh Malshe

IPC: G06F11/20 ,  G06F3/06 ,  G06F11/10

CPC classification number: G06F11/2094 ,  G06F3/064 ,  G06F3/0619 ,  G06F3/0647 ,  G06F3/0673 ,  G06F11/1068 ,  G06F2201/82

Abstract: A variety of applications can include apparatus and/or methods to preemptively detect defect prone memory blocks in a memory device and handle these memory blocks before they fail and trigger a data loss event. Metrics based on memory operations can be used to facilitate the examination of the memory blocks. One or more metrics associated with a memory operation on a block of memory can be tracked and a Z-score for each metric can be generated. In response to a comparison of a Z-score for a metric to a Z-score threshold for the metric, operations can be performed to control possible retirement of the memory block beginning with the comparison. Additional apparatus, systems, and methods are disclosed.

公开(公告)号：US11782627B2

公开(公告)日：2023-10-10

申请号：US17681075

申请日：2022-02-25

Applicant: Micron Technology, Inc.

Inventor： Kishore Kumar Muchherla ,  Ashutosh Malshe ,  Vamsi Pavan Rayaprolu ,  Harish R. Singidi ,  Gianni S. Alsasua

IPC: G06F11/07 ,  G06F3/06 ,  G11C16/34

CPC classification number: G06F3/0647 ,  G06F3/064 ,  G06F3/0619 ,  G06F3/0673 ,  G06F11/076 ,  G06F11/0727 ,  G06F11/0793 ,  G11C16/3431

Abstract: A processing device in a memory system receives a first read request from a host system, wherein the first read request is directed to first data stored at a first address in a block of the memory component. The processing device determines that the first address is located within a first region of the block and increments a read counter for the block by a default amount. The processing device further receives a second read request from the host system, wherein the second read request is directed to second data stored at a second address in a block of the memory component, determines that the second address is located within a second region of the block and increments the read counter for the block by a scaled amount.

公开(公告)号：US11762767B2

公开(公告)日：2023-09-19

申请号：US17302064

申请日：2021-04-22

Applicant: Micron Technology, Inc.

Inventor： Kishore Kumar Muchherla ,  Giuseppina Puzzilli ,  Vamsi Pavan Rayaprolu ,  Ashutosh Malshe ,  James Fitzpatrick ,  Shyam Sunder Raghunathan ,  Violante Moschiano ,  Tecla Ghilardi

IPC: G06F12/00 ,  G06F12/02 ,  G11C29/52 ,  G11C16/34 ,  G11C16/04

CPC classification number: G06F12/0269 ,  G11C16/3418 ,  G11C29/52 ,  G06F2212/702 ,  G11C16/0483

Abstract: A highly read data manager of a memory device receives a request to perform receives a request to perform a data relocation operation on a first wordline of a plurality of wordlines for a memory device, the memory device comprising a plurality of multi-level memory cells, wherein each multi-level memory cell comprises a plurality of pages; determines at the first wordline comprises data stored at one or more high read disturb pages of the plurality of pages; determines whether the data comprises a characteristic that satisfies a threshold criterion in relation to additional data stored on additional wordlines of the plurality of wordlines; responsive to determining that the data comprises the characteristic that satisfies the threshold criterion, identifies one or more low read disturb pages of the plurality of pages of a target wordline for relocating the data; and responsive to identifying the one or more low read disturb pages of the target wordline, stores at least a portion of the data at the one or more low read disturb pages of the target wordline.

公开(公告)号：US11740805B2

公开(公告)日：2023-08-29

申请号：US17837578

申请日：2022-06-10

Applicant: Micron Technology, Inc.

Inventor： Ashutosh Malshe ,  Kishore Kumar Muchherla ,  Vamsi Vamsi Rayaprolu ,  Harish R. Singidi

IPC: G06F3/06 ,  G06F16/23

CPC classification number: G06F3/0619 ,  G06F3/0655 ,  G06F3/0679 ,  G06F16/2365

Abstract: A distribution statistic is generated for a data block of a memory component based on a reliability statistic for memory cells sampled in the data block. The distribution statistic is indicative of at least one of a uniformity or a non-uniformity of read disturb stress on the sampled memory cells. At least a subset of the data block is relocated to another data block of the memory component in view of the distribution statistic.

公开(公告)号：US11704179B2

公开(公告)日：2023-07-18

申请号：US17452930

申请日：2021-10-29

Applicant: Micron Technology, Inc.

Inventor： Vamsi Pavan Rayaprolu ,  Harish R. Singidi ,  Ashutosh Malshe ,  Sampath K. Ratnam ,  Qisong Lin ,  Kishore Kumar Muchherla

IPC: G06F11/07 ,  G06F11/10 ,  G06F11/30 ,  G06F3/06

CPC classification number: G06F11/076 ,  G06F3/064 ,  G06F3/0616 ,  G06F3/0646 ,  G06F3/0653 ,  G06F3/0679 ,  G06F11/0757 ,  G06F11/1068 ,  G06F11/3058

Abstract: Read operations can be performed to read data stored at a data block. Parameters reflective of a separation between a pair of programming distributions associated with the data block can be determined based on the plurality of read operations. A read request to read the data stored at the data block can be received. In response to receiving the read request, a read operation can be performed to read the data stored at the data block based on the parameters that are reflective of the separation between the pair of programming distributions associated with the data block.