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公开(公告)号：US11675533B2
公开(公告)日：2023-06-13
申请号：US17825905
申请日：2022-05-26
Applicant: Seagate Technology LLC
Inventor： Zheng Wang , Marcus Marrow , Jason Bellorado
CPC classification number: G06F3/0656 , G06F3/0604 , G06F3/0673 , G06F18/295 , H03M13/3961 , H03M13/45
Abstract: A one-shot state transition decoder receives a codeword having N-bits. The decoder reads a first D-bits of the codeword to determine a stitching location d within the codeword. The stitching location identifies a start bit of unencoded data in the codeword. The codeword is decoded into an output buffer for user data of L bits, where N>L. Parameters of the decoder are set before the decoding, including setting a length of the codeword to N−L+d and a number of expected decoded bits to d. The decoding including decoding the d bits based on a set of state transition probabilities and copying decoded bits into the output buffer, the unencoded data being copied to the end of the output buffer.
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公开(公告)号：US20230153196A1
公开(公告)日：2023-05-18
申请号：US17525443
申请日：2021-11-12
Applicant: Seagate Technology LLC
Inventor： Jason Bellorado , Deepak Sridhara
CPC classification number: G06F11/1004 , H03M13/2909
Abstract: Systems and methods are disclosed for an improved utilization of parity within a data storage device, and manufacturing methods thereof. In some embodiments, a data storage device can implement an improved codeword redundancy process that can be utilized for data storage locations which were not previously scanned for defects. In some embodiments, a data storage device can implement an improved codeword redundancy process to store write data to a data storage location without having to perform a read operation prior to storing the write data to the storage location. The improved codeword redundancy process can include various methods of storing or updating an outer code codeword for the data to be stored.
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公开(公告)号：US20230067909A1
公开(公告)日：2023-03-02
申请号：US17460735
申请日：2021-08-30
Applicant: Seagate Technology LLC
Inventor： Zheng Wang , Ara Patapoutian , Jason Bellorado , William M. Radich
Abstract: Components are extracted from user data being read from a reader of a hard disk drive. The components collectively indicate both a magnitude and direction of a read offset of the reader over a track. The components are input to a machine-learning processor during operation of the hard disk drive, causing the machine-learning processor to produce an output. A read offset of the reader is estimated during the operation of the hard drive head based on the output of the machine learning processor. While reading the user data, a radial position of the reader over the track is adjusted via an actuator based on the estimated read offset.
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公开(公告)号：US11170815B1
公开(公告)日：2021-11-09
申请号：US16986590
申请日：2020-08-06
Applicant: Seagate Technology LLC
Inventor： Zheng Wu , Jason Bellorado , Marcus Marrow , Vincent Brendan Ashe
Abstract: An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.
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公开(公告)号：US11016681B1
公开(公告)日：2021-05-25
申请号：US16051244
申请日：2018-07-31
Applicant: Seagate Technology LLC
Inventor： Marcus Marrow , Jason Bellorado , Vincent Brendan Ashe , Zheng Wu
Abstract: An apparatus may include a circuit configured to receive an input signal at an input and process the input signal using a set of channel parameters. The circuit may further determine an error metric for the processing of the input signal using the set of channel parameters, compare the error metric to a plurality of thresholds, and when the error metric matches one of the plurality of thresholds, adapt, using an adaptation algorithm, the set of channel parameters to produce an updated set of channel parameters for use by the circuit as the set of channel parameters in subsequent processing of the input signal, the adaptation of the set of channel parameters being based on a weight corresponding to the matching threshold of the plurality of thresholds.
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Patent Agency Ranking
公开(公告)号：US10522177B1
公开(公告)日：2019-12-31
申请号：US16051234
申请日：2018-07-31
Applicant: Seagate Technology LLC
Inventor： Jason Bellorado , Marcus Marrow
Abstract: Systems and methods are disclosed for timing servo operations within a channel based on a counter for a disc locked clock. In certain embodiments, an apparatus may comprise a servo channel configured to lock a frequency of a servo channel clock to a rotational velocity of a disc data storage medium, and maintain a counter of clock cycles for the servo channel clock. The servo channel may perform operations to read servo data from a servo sector on the disc data storage medium at a first counter value selected relative to a target counter value corresponding to an expected location of a servo timing mark (STM).
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公开(公告)号：US10468060B1
公开(公告)日：2019-11-05
申请号：US16144659
申请日：2018-09-27
Applicant: Seagate Technology LLC
Inventor： Zheng Wu , Jason Bellorado , Marcus Marrow , Vincent Brendan Ashe
Abstract: An apparatus may comprise a circuit configured to receive first underlying data corresponding to a first signal and receive a second signal corresponding to second underlying data. The circuit may determine an interference component signal based on the first underlying data corresponding to the first signal and a first channel pulse response shape for the first signal, determine estimated decisions corresponding to the second signal based on the second signal, and determine an estimated signal based on the estimated decisions corresponding to the second signal and a second channel pulse response shape for the second signal. The circuit may then generate a remaining signal based on the estimated signal and the second signal, generate an error signal based on the interference component signal and the remaining signal, and adapt one or more parameters of the first channel pulse response shape based on the error signal.
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公开(公告)号：US10410672B1
公开(公告)日：2019-09-10
申请号：US16104933
申请日：2018-08-19
Applicant: Seagate Technology LLC
Inventor： Marcus Marrow , Jason Bellorado , Zheng Wu
Abstract: Systems and methods are disclosed for applying multi-stage multiple input single output (MISO) circuits for fast adaptation. An apparatus may comprise a first reader and a second reader configured to simultaneously read from a single track of a data storage medium, a MISO circuit. The MISO circuit may include a first stage filter having a first number of taps and configured to filter signal samples received from the first reader and the second reader and produce first filtered samples. The MISO circuit may also include a second stage filter having a second number of taps greater than the first number, and be configured to receive the first filtered samples corresponding to the first reader and the second reader from the first filter stage, filter the first filtered samples to produce second filtered samples, and combine the second filtered samples to produce a combined sample output.
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公开(公告)号：US10297281B1
公开(公告)日：2019-05-21
申请号：US15829426
申请日：2017-12-01
Applicant: Seagate Technology LLC
Inventor： Jason Bellorado , Marcus Marrow
IPC: G11B5/596 , G11B19/20 , G11B15/087
Abstract: Systems and methods are disclosed for detection of a servo sector on a data storage medium. A circuit may be configured to sample a signal, and determine preamble sample values from the sample values that correspond to a preamble pattern. When a preamble is detected, the circuit may continue to perform preamble detection, as well as determine signal reading parameters to apply during a servo timing mark (STM) search state based on the preamble sample values. In response to locating the STM, the circuit may generate an indication that the STM is located. In response to not locating the STM, the circuit may extend an STM search timeout period when the preamble pattern is still detected, or increment an STM search counter when the preamble pattern is not detected. The circuit may exit the STM search state when the STM search counter exceeds the STM search timeout period.
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公开(公告)号：US10276197B2
公开(公告)日：2019-04-30
申请号：US15793864
申请日：2017-10-25
Applicant: Seagate Technology LLC
Inventor： Jason Bellorado , Marcus Marrow
Abstract: An apparatus may include a first and second servo channels configured to output first and second position information to first and second writers, respectively, via a shared write path such that the first and second writers write first and second position information to first and second magnetic recording medium surfaces, respectively. In addition, the apparatus may include a controller configured to control the shared write path such that write access is changed between the first servo channel and second servo channel a plurality of times during a revolution of the first magnetic recording medium surface and second magnetic recording medium surface.
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