公开(公告)号：US12032886B2

公开(公告)日：2024-07-09

申请号：US17990518

申请日：2022-11-18

Applicant: Imagination Technologies Limited

Inventor： Robert McKemey

IPC: G06F30/323 ,  G06F30/337 ,  G06F30/398

CPC classification number: G06F30/323 ,  G06F30/337 ,  G06F30/398

Abstract: Methods and systems for verifying a hardware design for a multi-stage component configured to receive input data and generate output data by processing the input data at each of a plurality of successive stages wherein each stage is independently enabled is stall independent. For each stage from the second stage to the last stage: a relevant portion of the output data of an instantiation of the hardware design is verified as the same if the instantiation is in the same state when that stage is enabled in a cycle by any set of inputs and any subsequent stages are enabled in subsequent cycles by a first minimal sequence of inputs. The relevant portion of the output data of the hardware design is verified as the same if the instantiation is in the same state (i) when that stage is enabled in a cycle and any subsequent stages are enabled in subsequent cycles by a second minimal sequence of inputs and (ii) when that stage is stalled, then that stage is enabled in the next cycle and the subsequent stages are enabled in subsequent cycles by the second minimal sequence of inputs.

公开(公告)号：US12026820B2

公开(公告)日：2024-07-02

申请号：US17882999

申请日：2022-08-08

Applicant: Imagination Technologies Limited

Inventor： Rostam King

IPC: G06T15/04

CPC classification number: G06T15/04

Abstract: Methods and hardware for texture address generation comprise receiving fragment coordinates for an input block of fragments and texture instructions for the fragments and calculating gradients for at least one pair of fragments. Based on the gradients, the method determines whether a first mode or a second mode of texture address generation is to be used and then uses the determined mode and the gradients to perform texture address generation. The first mode of texture address generation performs calculations at a first precision for a subset of the fragments and calculations for remaining fragments at a second, lower, precision. The second mode of texture address generation performs calculations for all fragments at the first precision and if the second mode is used and more than half of the fragments in the input block are valid, the texture address generation is performed over two clock cycles.

公开(公告)号：US12026819B2

公开(公告)日：2024-07-02

申请号：US17873894

申请日：2022-07-26

Applicant: Imagination Technologies Limited

Inventor： Rostam King

IPC: G06T15/04 ,  G06F17/18 ,  G06T7/60 ,  G06T15/50

CPC classification number: G06T15/04 ,  G06F17/18 ,  G06T7/60 ,  G06T15/503

Abstract: A method of performing anisotropic texture filtering includes generating one or more parameters describing an elliptical footprint in texture space; performing isotropic filtering at each sampling point of a set of sampling points in an ellipse to be sampled to produce a plurality of isotropic filter results, the ellipse to be sampled based on the elliptical footprint; selecting, based on one or more parameters of the set of sampling points and one or more parameters of the ellipse to be sampled, weights of an anisotropic filter that minimize a cost function that penalises high frequencies in the filter response of the anisotropic filter under a constraint that the variance of the anisotropic filter is related to an anisotropic ratio squared, the anisotropic ratio being the ratio of a major radius of the ellipse to be sampled and a minor axis of the ellipse to be sampled; and combining the plurality of isotropic filter results using the selected weights of the anisotropic filter to generate at least a portion of a filter result.

公开(公告)号：US20240202991A1

公开(公告)日：2024-06-20

申请号：US18587288

申请日：2024-02-26

Applicant: Imagination Technologies Limited

Inventor： Rostam King

IPC: G06T11/00 ,  G06F30/31 ,  G06F30/392 ,  G06T1/20

CPC classification number: G06T11/001 ,  G06F30/31 ,  G06F30/392 ,  G06T1/20

Abstract: Methods and hardware for cube mapping comprise receiving fragment coordinates for an input block of fragments and texture instructions for the fragments and then determining, based on gradients of the input block of fragments, whether a first mode of cube mapping or a second mode of cube mapping is to be used, wherein the first mode of cube mapping performs calculations at a first precision for a subset of the fragments and calculations for remaining fragments at a second, lower, precision and the second mode of cube mapping performs calculations for all fragments at the first precision. Cube mapping is then performed using the determined mode and the gradients, wherein if the second mode is used and more than half of the fragments in the input block are valid, the cube mapping is performed over two clock cycles.

公开(公告)号：US12014457B2

公开(公告)日：2024-06-18

申请号：US17969383

申请日：2022-10-19

Applicant: Imagination Technologies Limited

Inventor： Luke T. Peterson ,  Justin P. DeCell ,  Jens Fursund

IPC: G06T15/06 ,  G06T15/00 ,  G06T15/04 ,  G06T15/50

CPC classification number: G06T15/06 ,  G06T15/00 ,  G06T15/005 ,  G06T15/04 ,  G06T15/506 ,  G06T2215/12 ,  G06T2215/16

Abstract: A bounce light map for a scene is determined for use in rendering the scene in a graphics processing system. Initial lighting indications representing lighting within the scene are determined. For a texel position of the bounce light map, the initial lighting indications are sampled using an importance sampling technique to identify positions within the scene. Sampling rays are traced between a position in the scene corresponding to the texel position of the bounce light map and the respective identified positions with the scene. A lighting value is determined for the texel position of the bounce light map using results of the tracing of the sampling rays. By using the importance sampling method described herein, the rays which are traced are more likely to be directed towards more important regions of the scene which contribute more to the lighting of a texel.

公开(公告)号：US12008791B2

公开(公告)日：2024-06-11

申请号：US17213628

申请日：2021-03-26

Applicant: Imagination Technologies Limited

Inventor： Xile Yang

IPC: G06T9/00 ,  H04N19/182 ,  H04N19/50

CPC classification number: G06T9/005 ,  G06T9/004 ,  H04N19/182 ,  H04N19/50

Abstract: A computer-implemented method and a compression unit for performing lossy compression on a block of image data in accordance with a multi-level difference table. The block of image data comprises a plurality of image element values, wherein each level of the multi-level difference table comprises a plurality of entries. An origin value for the block of image data is determined. A level within the multi-level difference table for the block of image data is determined. For each image element value in the block of image data, one of the entries at the determined level within the multi-level difference table is selected. A compressed block of data for the block of image data is formed, wherein the compressed block of data comprises: (i) data representing the determined origin value, (ii) an indication of the determined level, and (iii) for each image element value in the block of image data, an indication of the selected entry for that image element value.

公开(公告)号：US12008703B2

公开(公告)日：2024-06-11

申请号：US17375315

申请日：2021-07-14

Applicant: Imagination Technologies Limited

Inventor： Simon Fenney

IPC: G06T15/06 ,  G06F9/50 ,  G06T15/08 ,  G06T15/50 ,  G06T17/00 ,  G06T17/10

CPC classification number: G06T15/06 ,  G06F9/5027 ,  G06T15/08 ,  G06T15/506 ,  G06T17/10 ,  G06T2210/21

Abstract: A computer-implemented method of creating a bounding volume hierarchy (BVH) for a model defined with respect to a local coordinate system for the model. The method includes defining BVH branch nodes within the model, establishing a plurality of local transformation matrices for the BVH; and for each BVH branch node, determining a first bounding volume and associating the branch node with one of the plurality of local transformation matrices that maps between the first bounding volume and a second bounding volume in the local coordinate system.

公开(公告)号：US20240185501A1

公开(公告)日：2024-06-06

申请号：US18418305

申请日：2024-01-21

Applicant: Imagination Technologies Limited

Inventor： Steven J. Clohset ,  Jason R. Redgrave ,  Luke T. Peterson

IPC: G06T15/00 ,  G06F12/0804 ,  G06F12/0862 ,  G06F12/126 ,  G06T1/60 ,  G06T5/77 ,  G06T15/06 ,  G06T17/10

CPC classification number: G06T15/005 ,  G06F12/0804 ,  G06T1/60 ,  G06T5/77 ,  G06T15/06 ,  G06T17/10 ,  G06F12/0862 ,  G06F12/126 ,  G06F2212/1024 ,  G06F2212/302 ,  G06F2212/452 ,  G06F2212/455

Abstract: In an aspect, an update unit can evaluate condition(s) in an update request and update one or more memory locations based on the condition evaluation. The update unit can operate atomically to determine whether to effect the update and to make the update. Updates can include one or more of incrementing and swapping values. An update request may specify one of a pre-determined set of update types. Some update types may be conditional and others unconditional. The update unit can be coupled to receive update requests from a plurality of computation units. The computation units may not have privileges to directly generate write requests to be effected on at least some of the locations in memory. The computation units can be fixed function circuitry operating on inputs received from programmable computation elements. The update unit may include a buffer to hold received update requests.

公开(公告)号：US11995386B2

公开(公告)日：2024-05-28

申请号：US18201070

申请日：2023-05-23

Applicant: Imagination Technologies Limited

Inventor： Sam Elliott

IPC: G06F30/30 ,  G01R31/3183 ,  G06F30/33 ,  G06F30/3323 ,  G06F30/337 ,  G06F30/3308 ,  G06F111/12 ,  G06F115/02 ,  G06F119/16

CPC classification number: G06F30/33 ,  G01R31/318314 ,  G06F30/3323 ,  G06F30/337 ,  G06F30/3308 ,  G06F2111/12 ,  G06F2115/02 ,  G06F2119/16

Abstract: A hardware design for a main data transformation component is verified. The main data transformation component is representable as a hierarchical set of data transformation components which includes (i) leaf data transformation components which do not have children, and (ii) parent data transformation components which comprise one or more child data transformation components. For each of the leaf data transformation components, it is verified that an instantiation of the hardware design for the leaf data transformation component generates an expected output transaction. For each of the parent data transformation components, it is formally verified that an instantiation of an abstracted hardware design generates an expected output transaction in response to each of test input transactions. The abstracted hardware design for the parent data transformation component represents each of the child data transformation components of the parent data transformation component with a corresponding abstracted component that for a specific input transaction to the child data transformation component produces a specific output transaction with a causal deterministic relationship to the specific input transaction.

公开(公告)号：US20240169473A1

公开(公告)日：2024-05-23

申请号：US18425402

申请日：2024-01-29

Applicant: Imagination Technologies Limited

Inventor： Michael Worcester ,  Stuart Smith ,  Simon Fenney

IPC: G06T1/60 ,  G06T1/20 ,  G06T11/40 ,  G06T15/00 ,  G06T17/10

CPC classification number: G06T1/60 ,  G06T1/20 ,  G06T11/40 ,  G06T15/005 ,  G06T17/10

Abstract: A graphics processing system includes a tiling unit configured to tile a scene into a plurality of tiles. A processing unit identifies tiles of the plurality of tiles that are each associated with at least a predetermined number of primitives. A memory management unit allocates a portion of memory to each of the identified tiles and does not allocate a portion of memory for each of the plurality of tiles that are not identified by the processing unit. A rendering unit renders each of the identified tiles and does not render tiles that are not identified by the processing unit.