公开(公告)号：US09420695B2

公开(公告)日：2016-08-16

申请号：US14548118

申请日：2014-11-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Chang Su ,  Chih-Cheng Lee ,  Cheng-Lin Ho

IPC: H01L23/552 ,  H05K1/18 ,  H01L23/498 ,  H01L21/48 ,  H05K3/30 ,  H05K3/46 ,  H05K3/10 ,  H05K3/18

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2924/0002 ,  H05K1/188 ,  H01L2924/00

Abstract: Disclosed is a semiconductor package structure and manufacturing method. The semiconductor package structure includes a first dielectric layer, a second dielectric layer, a component, a patterned conductive layer and at least two conductive vias. The first dielectric layer has a first surface and a second surface opposite the first surface. The second dielectric layer has a first surface and a second surface opposite the first surface. The second surface of the first dielectric layer is attached to the first surface of the second dielectric layer. A component within the second dielectric layer has at least two electrical contacts adjacent to the second surface of the first dielectric layer. The patterned conductive layer within the first dielectric layer is adjacent to the first surface of the first dielectric layer. The conductive vias penetrate the first dielectric layer and electrically connect the electrical contacts with the patterned conductive layer.

Abstract translation: 公开了半导体封装结构和制造方法。 半导体封装结构包括第一电介质层，第二电介质层，部件，图案化导电层和至少两个导电通孔。 第一电介质层具有与第一表面相对的第一表面和第二表面。 第二电介质层具有与第一表面相对的第一表面和第二表面。 第一电介质层的第二表面附着到第二电介质层的第一表面。 第二电介质层内的部件具有与第一电介质层的第二表面相邻的至少两个电触点。 第一介电层内的图案化导电层与第一介电层的第一表面相邻。 导电通孔穿透第一电介质层并将电触点与图案化的导电层电连接。