公开(公告)号：US20200226039A1

公开(公告)日：2020-07-16

申请号：US16582592

申请日：2019-09-25

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F11/16 ,  G06F11/10 ,  G06F11/07 ,  G11C11/4094 ,  G11C29/42

Abstract: An apparatus for controlling an operation in a memory system includes a volatile memory including plural memory cells, a column data checking circuitry configured to determine whether all pieces of data outputted from memory cells corresponding to a bit line are identical to each other, and an error correction circuitry configured to determine whether the pieces of data include an error based at least on a type of data, a state of data, and an output of the column data checking circuitry, and to resolve the error.

公开(公告)号：US20200225867A1

公开(公告)日：2020-07-16

申请号：US16678771

申请日：2019-11-08

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

Abstract: A memory system includes a memory device having a plurality of memory blocks for storing data, and a controller configured to perform an erase operation including plural unit erase operations to erase data stored in at least one target memory block included in the plurality of memory blocks. The controller can be configured to perform at least some of the plural unit erase operations onto the at least one target memory block before the at least one target memory block allocated for storing data.

公开(公告)号：US20200159455A1

公开(公告)日：2020-05-21

申请号：US16570614

申请日：2019-09-13

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

Abstract: A method for operating a memory system includes performing a block access task on a first block in a memory device, the memory device having a plurality of blocks, generating log information when a power supply voltage becomes lower than a given level, the log information including a check point and block information, the check point indicating the block access task, the block information indicating a second block, and performing the block access task on the second block indicated in the block information of the log information when the power supply voltage becomes equal to or greater than the given level.

公开(公告)号：US20200097399A1

公开(公告)日：2020-03-26

申请号：US16389449

申请日：2019-04-19

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F12/02

Abstract: A memory system includes: a memory device including map memory blocks and data memory blocks; and a controller suitable to: detect, as victim memory blocks, map memory blocks each having an erase count less than or equal to an average erase count of the data memory blocks when an average erase count of the map memory blocks is less than the average erase count of the data memory blocks and a difference between the average erase count of the map memory blocks and the average erase count of the data memory blocks is greater than a first threshold; and perform a garbage collection operation on the detected first victim memory blocks, map data stored in hot data memory blocks to the first victim memory blocks, and map data stored in cold map memory blocks to the hot data memory blocks.

公开(公告)号：US20200089581A1

公开(公告)日：2020-03-19

申请号：US16382999

申请日：2019-04-12

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F11/14 ,  G11C16/30

Abstract: A memory system includes: a memory device suitable for storing system operating information; and a controller suitable for performing a check-pointing operation whenever a background operation is to be performed, performing the background operation based on the system operating information, and performing a roll-back operation based on the system operating information stored by the check-pointing operation at a time right before the background operation is performed when an error occurs during the background operation, wherein the controller performs the roll-back operation by reflecting error information on the error into the system operating information, and performing the background operation based on the system operating information with the error information reflected therein.

公开(公告)号：US20190212936A1

公开(公告)日：2019-07-11

申请号：US16058360

申请日：2018-08-08

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/0641 ,  G06F3/0608 ,  G06F3/0673

Abstract: An operating method for a memory system includes accumulating any one of a number of accessed word lines or a predetermined access count value, in a nominal access count value for each of the memory block including duplicating accessed word lines; and performing a read reclaim operation onto each of the memory blocks based on the nominal access count value.

公开(公告)号：US20180081551A1

公开(公告)日：2018-03-22

申请号：US15602732

申请日：2017-05-23

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06 ,  G06F11/14 ,  G06F11/10 ,  G11C29/52

CPC classification number: G06F11/1469 ,  G06F3/0604 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/0685 ,  G06F11/1068 ,  G06F11/1072 ,  G06F11/1441 ,  G06F11/1451 ,  G06F2201/805 ,  G06F2201/82 ,  G11C29/52

Abstract: A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for performing a program operation of storing data segments and meta segments in the pages, and recording a checkpoint information for the program operation in the pages.

公开(公告)号：US20180074711A1

公开(公告)日：2018-03-15

申请号：US15605231

申请日：2017-05-25

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0679 ,  G06F3/0685

Abstract: A memory system includes: a nonvolatile memory device that includes a plurality of memory blocks; a volatile memory device; and a controller suitable for grouping the plurality of the memory blocks by a predetermined number of memory blocks into K block groups, storing in the volatile memory K operation information groups and K version information groups, and selectively copying updated operation information in the K operation information groups from the volatile memory into the nonvolatile memory device at a predetermined moment based on the K version information groups.

公开(公告)号：US20180018112A1

公开(公告)日：2018-01-18

申请号：US15438878

申请日：2017-02-22

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/061 ,  G06F3/064 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0688

Abstract: A memory system may include: a memory device including a plurality of memory blocks, each of the memory blocks including a plurality of pages; and a controller suitable for: storing user data corresponding to a write command, in the memory blocks; storing map data corresponding to the stored user data, in the memory blocks; determining entropies indicating amounts of the map data updated in the memory blocks which correspond to the stored user data; and selecting source memory blocks among the memory blocks, which correspond to the entropies.

公开(公告)号：US20170322849A1

公开(公告)日：2017-11-09

申请号：US15406261

申请日：2017-01-13

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F11/14 ,  G11C16/10 ,  G06F3/06 ,  G11C16/16

CPC classification number: G06F3/0611 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7205 ,  G11C16/10 ,  G11C16/14 ,  G11C16/16 ,  G11C16/32 ,  G11C16/3495

Abstract: A memory system may include a memory device including a plurality of pages which include a plurality of memory cells coupled with a plurality of word lines and are stored with data, a plurality of memory blocks in which the pages are included, a plurality of planes which include the memory blocks, and a plurality of memory dies in which the planes are included; and a controller suitable for performing a program operation corresponding to a write command received from a host, at a first point of time, for first memory blocks among the memory blocks, checking program information for the program operation at the first point of time, predicting erase information on the memory blocks in correspondence to the program information, performing an erase operation for second memory blocks among the memory blocks, at a second point of time after the first point of time, in correspondence to the erase information, and performing the program operation for the second memory blocks at a third point of time after the second point of time.