公开(公告)号：US09984269B1

公开(公告)日：2018-05-29

申请号：US15453230

申请日：2017-03-08

Applicant: Tower Semiconductor Ltd. ,  Newport Fab LLC

Inventor： Yakov Roizin ,  Rassul Karabalin ,  David J. Howard

IPC: G06K9/00

CPC classification number: G06K9/00013 ,  G06K9/001

Abstract: A solid-state fingerprint sensor including an array of pixels, each pixel including an electrically isolated NVM structure, a security NVM cell and a normally-open MEMS switch. The electrically isolated NVM structure includes a polycrystalline silicon gate structure connected by a metal via structure to a fixed electrode that forms part of the MEMS switch. Initial charges stored on the electrically isolated NVM structures before each sensing operation are discharged to ground by the MEMS switch when a fingerprint ridge is aligned with the pixel and produces an applied actuating force on the MEMs switch. Final pixel charge values (i.e., either the initial charge or no charge) stored on each electrically isolated NVM structure after each sensing operation are encrypted using security bits stored on the security NVM cells such that only encrypted image data is transmitted from the pixels to external circuitry.

公开(公告)号：US09885697B2

公开(公告)日：2018-02-06

申请号：US14958037

申请日：2015-12-03

Applicant: Tower Semiconductor Ltd.

Inventor： Yakov Roizin ,  Menachem Vofsy

IPC: G01N27/74 ,  G01N33/00 ,  H01L43/08 ,  H01L27/22

CPC classification number: G01N33/0065 ,  G01N27/74 ,  G01N33/0027 ,  G01N33/0062 ,  H01L27/22 ,  H01L43/08

Abstract: A CMOS gas sensor that uses MTJ elements to capture/store gas concentration level data at high temperatures for later readout at low temperatures. Each MTJ element includes a storage layer whose magnetic orientation is switchable between parallel and anti-parallel directions relative to a fixed reference when heated above the storage layer's blocking temperature, whereby the MTJ element is switchable between low and high resistance states. During operation, reaction heat generated by a gas sensing element raises the MTJ element's temperature above the blocking temperature when ambient target gas exceeds a minimum concentration level, whereby an applied magnetic biasing force causes the storage layer's magnetic orientation to switch relative to the fixed reference, whereby the MTJ element captures measured concentration level data for later readout. In one embodiment, multiple MTJ elements connected in a NAND-type string switch at different concentration levels to provide highly accurate quantitative measurement data.

公开(公告)号：US09865632B2

公开(公告)日：2018-01-09

申请号：US15658328

申请日：2017-07-24

Applicant: Tower Semiconductor Ltd.

Inventor： Assaf Lahav ,  Amos Fenigstein ,  Yakov Roizin ,  Avi Strum

IPC: H04N5/335 ,  H01L27/146 ,  H04N5/353 ,  H04N5/3745

CPC classification number: H01L27/1461 ,  H01L27/14609 ,  H01L27/14614 ,  H01L27/14623 ,  H01L27/14643 ,  H04N5/3532 ,  H04N5/3745 ,  H04N5/37452 ,  H04N5/3765

Abstract: A global shutter image sensor formed on an n-type bulk substrate and including pixels having pinned n-type photodiodes and memory nodes formed in designated n-doped epitaxial layer regions that are separated from the bulk substrate by a p-type vertical (potential) barrier implant. Each memory node includes both a buried channel portion and a contiguous pinned diode portion having different doping levels such that an intrinsic lateral electrical field drives electrons from the buried channel portion into the pinned diode portion during global charge transfer from an adjacent photodiode. The p-type vertical (potential) barrier implant is coupled to ground, and the bulk substrate is switched between a low integration voltage level during integration periods, and a high reset voltage level, whereby the photodiodes are globally reset without requiring reset transistors. P-type sinker implant sections and p-type vertical barrier implants form box-like diffusions around each pixel's photodiode and memory node.

公开(公告)号：US09835589B2

公开(公告)日：2017-12-05

申请号：US14958048

申请日：2015-12-03

Applicant: Tower Semiconductor Ltd.

Inventor： Yakov Roizin ,  Menachem Vofsy

IPC: G01N27/74 ,  G01N33/00

CPC classification number: G01N27/74 ,  G01N33/0027

Abstract: Gas sensing using MTJ elements to capture/store gas concentration level data for readout at room temperature. In one embodiment, during reset the MTJ elements are heated above blocking temperatures of their storage layers while applying a first magnetic biasing force to set initial magnetic orientations. During gas sensing, reaction heat from a gas sensing element combines with control heat to raise each MTJ element's temperature from a work point temperature above its blocking temperature only when the target gas exceeds an associated concentration level, whereby a second magnetic biasing force causes the magnetic orientation to switch directions. During readout, read currents are measured to determine the MTJ elements' final resistance states, which indicate their switched/non-switched states, and the resistance states are correlated with stored data to determine the measured gas concentration level. The MTJ elements are cooled after reset and gas sensing to facilitate accurate CDS readout data.

公开(公告)号：US09729810B2

公开(公告)日：2017-08-08

申请号：US14665803

申请日：2015-03-23

Applicant: Tower Semiconductor Ltd.

Inventor： Assaf Lahav ,  Amos Fenigstein ,  Yakov Roizin ,  Avi Strum

IPC: H04N5/335 ,  H04N5/3745 ,  H04N5/376 ,  H01L27/146

CPC classification number: H04N5/37452 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14614 ,  H01L27/14623 ,  H01L27/14643 ,  H04N5/3765

Abstract: A global shutter (GS) image sensor pixel includes a pinned photodiode connected to a memory node by a first transfer gate transistor, and a floating diffusion connected to the memory node by a second transfer gate transistor. The memory node includes a buried channel portion disposed under the first transfer gate transistor and a contiguous pinned diode portion disposed between the first and second transfer gate transistors, where the two memory node portions have different doping levels such that an intrinsic lateral electrical field drives electrons from the buried channel portion into the pinned diode portion. The floating diffusion node similarly includes a buried channel portion disposed under the second transfer gate transistor and a contiguous pinned diode portion that generate a second intrinsic lateral electrical field that drives electrons into the pinned diode portion of the floating diffusion. A 6T CMOS pixel is disclosed that facilitates low-noise CDS readout.

公开(公告)号：US09431455B2

公开(公告)日：2016-08-30

申请号：US14536649

申请日：2014-11-09

Applicant: Tower Semiconductor Ltd.

Inventor： Amos Fenigstein ,  Yakov Roizin ,  Avi Strum

IPC: H01L27/146

CPC classification number: H01L27/14685 ,  H01L27/1462 ,  H01L27/14689 ,  H01L27/14692 ,  H01L27/14698

Abstract: A method for fabricating image sensors and other semiconductor ICs that controls the amount of hydrogen generated during back-end processing. The back-end processing includes forming multiple metallization layers after front-end processing is completed (i.e., after forming the pre-metal dielectric), where each metallization layer includes a patterned aluminum structure, an interlevel dielectric (ILD) layer including TEOS-based oxide formed over the patterned aluminum structure. A cap layer including a low-moisture content oxide such as silane oxide (i.e., SiO2 generated by way of a silane CVD process) is formed over at least one ILD layer. The cap layer serves as an etch-stop for the subsequently-formed metal layer of a next metallization layer by isolating the underlying ILD material from the plasma environment during aluminum over-etch, which significantly reduces the production and migration of hydrogen into front-end structures.

Abstract translation: 一种制造图像传感器和其他半导体IC的方法，其控制在后端处理期间产生的氢气量。 后端处理包括在前端处理完成之后形成多个金属化层（即，在形成预金属电介质之后），其中每个金属化层包括图案化的铝结构，层间电介质（ILD）层，包括基于TEOS的 形成在图案化铝结构上的氧化物。 在至少一个ILD层上形成包含诸如硅烷氧化物（即通过硅烷CVD工艺生成的SiO 2）的低含水量氧化物的盖层。 在铝过蚀刻期间，通过将下面的ILD材料与等离子体环境隔离，盖层用作随后形成的下一个金属化层的金属层的蚀刻停止层，这显着地减少了氢的生成和迁移到前端 结构。

公开(公告)号：US20150325279A1

公开(公告)日：2015-11-12

申请号：US14274609

申请日：2014-05-09

Applicant: Tower Semiconductor Ltd.

Inventor： Yakov Roizin ,  Avi Strum

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C15/02

Abstract: A match-in-place-type compare operation utilizes a string of Magnetic Tunnel Junction (MTJ) elements including storage layers and sense layers having different anti-ferromagnetic structures respectively having higher and lower blocking temperatures. Confidential data is written into the storage layers of the MTJ elements by heating the elements above the higher blocking temperature, and then orienting the storage and sense layers in first storage magnetization directions using field lines. The elements are then cooled to an intermediate temperature between the higher and lower blocking temperatures, and the field lines are turned off, setting the sense layers to preliminary storage magnetization directions opposite to the first directions. During a pre-compare phase, an input logic pattern is written into the sense layers by heating to the intermediate temperature. During a compare operation, with the field lines turned off, resistance of the MTJ string is detected by passing a read current through the string.

Abstract translation: 现场对位式比较操作使用一系列磁隧道结（MTJ）元件，包括具有不同反铁磁结构的存储层和感测层，分别具有较高和较低的阻挡温度。 机密数据通过加热高于更高阻挡温度的元件，然后使用场线在第一存储磁化方向上定向存储和感测层，将MTJ元件的存储层写入到存储层中。 然后将元件冷却到较高和较低阻断温度之间的中间温度，并且将场线关闭，将感应层设置为与第一方向相反的初步储存磁化方向。 在预比较阶段期间，通过加热到中间温度将输入逻辑图案写入感测层。 在比较操作期间，当场线被关闭时，通过将读取的电流通过串来检测MTJ串的电阻。

公开(公告)号：US20150162369A1

公开(公告)日：2015-06-11

申请号：US14101282

申请日：2013-12-09

Applicant: Tower Semiconductor Ltd.

Inventor： Yakov Roizin ,  Evgeny Pikhay ,  Vladislav Dayan ,  Micha Gutman

IPC: H01L27/146

CPC classification number: H01L27/14659

Abstract: Solid state radiation sensors include a floating gate (FG) structure having a large control capacitor region disposed on thick dielectric portion over a control gate (CG) implemented by an isolated P-well region, and a tunneling capacitor region disposed on thin gate oxide dielectric over another tunneling gate (TG) isolated P-well region. Opposite voltages (e.g., +5V/−5V) are respectively applied to the CG and TG P-well regions to charge the FG structure by Fowler-Nordheim tunneling. During exposure, radiation striking the sensor discharges the FG structure by generating electron-hole pairs in the dielectric portion separating the CG P-well region and the control capacitor region. After exposure, the total ionizing dose (TID) is calculated, e.g., by measuring the threshold voltage shift of a CMOS readout inverter controlled by the residual charge stored on the FG structure. Sensor performance is enhanced by metal plates, utilizing two control capacitors, or modifying the FG electrode layout.

Abstract translation: 固态辐射传感器包括浮置栅极（FG）结构，其具有设置在由隔离的P阱区域实现的控制栅极（CG）上的厚介电部分上的大的控制电容器区域，以及设置在薄栅极氧化物电介质上的隧穿电容器区域 在另一个隧道门（TG）隔离的P阱区域。 分别将相对电压（例如+ 5V / -5V）施加到CG和TG P阱区域，以通过Fowler-Nordheim隧道对FG结构充电。 在曝光期间，撞击传感器的辐射通过在分离CG P阱区域和控制电容器区域的电介质部分中产生电子 - 空穴对来排出FG结构。 曝光后，计算总电离剂量（TID），例如通过测量由FG结构上存储的剩余电荷控制的CMOS读出逆变器的阈值电压偏移。 通过金属板，利用两个控制电容器或修改FG电极布局来增强传感器性能。

公开(公告)号：US20150108425A1

公开(公告)日：2015-04-23

申请号：US14402348

申请日：2013-05-21

Applicant: Ramot at Tel-Aviv University Ltd. ,  Tower Semiconductor Ltd.

Inventor： Gil Rosenman ,  Simon Litsyn ,  Yakov Roizin

IPC: H01L51/42 ,  H01L51/05 ,  H01L27/30 ,  H01L51/56 ,  H01L27/32 ,  H01L29/06 ,  H01L43/12 ,  H01L43/02 ,  H01L27/22 ,  H01L27/28 ,  H01L27/115 ,  H01L51/00 ,  H01L43/10

CPC classification number: H01L51/4213 ,  B01J13/04 ,  B01J13/203 ,  B01J13/22 ,  B32B3/20 ,  B32B15/02 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y25/00 ,  B82Y30/00 ,  B82Y40/00 ,  C23C16/4417 ,  C23C16/455 ,  C23C16/45525 ,  G11C11/5671 ,  G11C13/0014 ,  G11C13/0019 ,  G11C16/04 ,  G11C16/0408 ,  G11C16/0483 ,  G11C2213/18 ,  G11C2213/75 ,  G11C2213/81 ,  H01G11/24 ,  H01G11/30 ,  H01G11/36 ,  H01L21/28273 ,  H01L27/10 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/146 ,  H01L27/14625 ,  H01L27/222 ,  H01L27/283 ,  H01L27/301 ,  H01L27/307 ,  H01L27/3204 ,  H01L28/60 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/82 ,  H01L33/00 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L51/0002 ,  H01L51/0093 ,  H01L51/0512 ,  H01L51/56 ,  H01M4/02 ,  H01M4/366 ,  Y02E60/13

Abstract: A method of fabricating a nanoshell is disclosed. The method comprises coating a nanometric core made of a first material by a second material, to form a core-shell nanostructure and applying non-chemical treatment to the core-shell nanostructure so as to at least partially remove the nanometric core, thereby fabricating a nanoshell. The disclosed nanoshell can be used in the fabrication of transistors, optical devices (such as CCD and CMOS sensors), memory devices and energy storage devices.

Abstract translation: 公开了一种制造纳米壳的方法。 该方法包括用第二材料涂覆由第一材料制成的纳米芯，以形成核 - 壳纳米结构，并对核 - 壳纳米结构进行非化学处理，以便至少部分地除去纳米核，由此制造 纳秒壳 所公开的纳米壳可用于制造晶体管，光学器件（例如CCD和CMOS传感器），存储器件和能量存储器件。

公开(公告)号：US20140264500A1

公开(公告)日：2014-09-18

申请号：US13831413

申请日：2013-03-14

Applicant: Yissum Research Development Company of The Hebrew University of Jerusalem Ltd. ,  TOWER SEMICONDUCTOR LTD.

Inventor： Yakov Roizin ,  Evgeny Pikhay ,  Irit Chen-Zamero ,  Ora Eli ,  Micha Asscher ,  Amir Saar

IPC: H01L27/142 ,  H01L31/0352

CPC classification number: H01L27/142 ,  H01L31/047 ,  H01L31/0475 ,  H01L31/075 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes disposed on a silicon island formed by a P− epitaxial layer and surrounded by trenches that provide lateral isolation, where the island is separated from the substrate by a porous silicon region that is grown under the island and isolates the lower portions of the photovoltaic device from the highly doped substrate. The trenches extend through the P− epitaxial material into the P+ substrate to facilitate self-limiting porous silicon formation at the bottom of the island, and also to suppress electron-hole recombination. A protective layer (e.g., SiN) is formed on the trench walls to further restrict porous silicon formation to the bottom of the island. Black silicon on the trench walls enhances light capture. The photovoltaic devices form low-cost embedded photovoltaic arrays on CMOS IC devices, or are separated to produce low-cost, HV solar arrays for solar energy sources, e.g. for solar concentrators.

Abstract translation: 光伏器件包括设置在由P型外延层形成并由提供横向隔离的沟槽围绕的硅岛上的侧向PIN光敏二极管，其中该岛通过在岛下生长的多孔硅区域从衬底分离 并将光电器件的下部与高度掺杂的衬底分离。 沟槽延伸穿过P-外延材料进入P +衬底，以促进岛底部的自限多孔硅形成，并且还抑制电子 - 空穴复合。 在沟槽壁上形成保护层（例如SiN），以进一步限制多孔硅形成到岛的底部。 沟槽壁上的黑色硅增强了光捕获。 光伏器件在CMOS IC器件上形成低成本嵌入式光伏阵列，或者被分离以产生用于太阳能源的低成本，高压太阳能电池阵列。 用于太阳能集中器。