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公开(公告)号:US20230111035A1
公开(公告)日:2023-04-13
申请号:US18079901
申请日:2022-12-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Wen-Jung Liao
IPC: H01L29/778 , H01L29/66 , H01L29/06
Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a first recess, a second recess, a passivation layer, and an etch mask layer. The group III-V barrier layer includes a thinner portion, a first thicker portion and a second thicker portion in the active region, the thinner portion surrounds the first thicker portion, and the second thicker portion surrounds the thinner portion. The first recess is disposed in the group III-V barrier layer in the active region. The second recess is disposed in the group III-V barrier layer in the isolation region.
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公开(公告)号:US11610989B2
公开(公告)日:2023-03-21
申请号:US17191598
申请日:2021-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Chun-Liang Hou , Wen-Jung Liao
IPC: H01L29/778 , H01L21/306 , H01L29/20 , H01L29/66
Abstract: The present disclosure provides a high electron mobility transistor (HEMT) including a substrate; a buffer layer over the substrate; a GaN layer over the buffer layer; a first AlGaN layer over the GaN layer; a first AlN layer over the first AlGaN layer; a p-type GaN layer over the first AlN layer; and a second AlN layer on the p-type GaN layer.
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公开(公告)号:US11502177B2
公开(公告)日:2022-11-15
申请号:US17337437
申请日:2021-06-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shin-Chuan Huang , Chih-Tung Yeh , Chun-Ming Chang , Bo-Rong Chen , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/66 , H01L29/778 , H01L29/205 , H01L29/423
Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.
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公开(公告)号:US20220278223A1
公开(公告)日:2022-09-01
申请号:US17745853
申请日:2022-05-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Che-Hung Huang , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/66 , H01L29/778
Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, a barrier layer on the buffer layer, a p-type semiconductor layer on the buffer layer, a gate electrode on the p-type semiconductor layer, a source electrode and a drain electrode adjacent to two sides of the gate electrode on the barrier layer, a hard mask on the barrier layer and around the p-type semiconductor layer, the source electrode, and the drain electrode, and a passivation layer on the hard mask.
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公开(公告)号:US11367779B2
公开(公告)日:2022-06-21
申请号:US16666414
申请日:2019-10-29
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Che-Hung Huang , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/66 , H01L29/778
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
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公开(公告)号:US20220140124A1
公开(公告)日:2022-05-05
申请号:US17575655
申请日:2022-01-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shin-Chuan Huang , Chih-Tung Yeh , Chun-Ming Chang , Bo-Rong Chen , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/778 , H01L29/66 , H01L21/265 , H01L29/205 , H01L29/20
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
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公开(公告)号:US20210288150A1
公开(公告)日:2021-09-16
申请号:US17337437
申请日:2021-06-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shin-Chuan Huang , Chih-Tung Yeh , Chun-Ming Chang , Bo-Rong Chen , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/205 , H01L29/778 , H01L29/423 , H01L29/66
Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.
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公开(公告)号:US20210273086A1
公开(公告)日:2021-09-02
申请号:US17321534
申请日:2021-05-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Wen-Jung Liao
IPC: H01L29/778 , H01L29/66 , H01L29/06
Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, recesses, a passivation layer and an etch mask layer. The group III-V body layer is disposed on the substrate. The group III-V barrier layer is disposed on the group III-V body layer in the active region and the isolation region. The recesses are disposed in the group III-V barrier layer in the active region and the isolation region, respectively. The passivation layer disposed in the recesses of the active region and the isolation region. The etch mask layer disposed between the passivation layer and the group III-V barrier layer in the active region, where the etch mask layer is spaced apart from bottoms of the recesses in the active region and the isolation region.
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公开(公告)号:US20210175343A1
公开(公告)日:2021-06-10
申请号:US16731058
申请日:2019-12-31
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Bo-Rong Chen , Che-Hung Huang , Chun-Ming Chang , Yi-Shan Hsu , Chih-Tung Yeh , Shin-Chuan Huang , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/66 , H01L29/20 , H01L29/778
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
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公开(公告)号:US20210167198A1
公开(公告)日:2021-06-03
申请号:US16726263
申请日:2019-12-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Wen-Jung Liao , Chun-Liang Hou
IPC: H01L29/778 , H01L29/20 , H01L29/205 , H01L29/06 , H01L29/34 , H01L21/265 , H01L21/306 , H01L21/02 , H01L29/66
Abstract: A mesa structure includes a substrate. A mesa protrudes out of the substrate. The mesa includes a slope and a top surface. The slope surrounds the top surface. A lattice damage area is disposed at inner side of the slope. The mesa can optionally further includes an insulating layer covering the lattice damage area. The insulating layer includes an oxide layer or a nitride layer.
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