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公开(公告)号:US10547846B2
公开(公告)日:2020-01-28
申请号:US15488801
申请日:2017-04-17
Applicant: Intel Corporation
Inventor: Robert J. Johnston , Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Joydeep Ray
IPC: H04N19/00 , H04N19/137 , G11B27/00 , H04N19/107 , H04N19/124 , H04N19/182 , H04N19/17 , H04N19/167
Abstract: Image information is often transmitted from one electronic device to another. Such information is typically encoded and/or compressed to reduce the bandwidth required for transmission and/or to decrease the time necessary for transmission. Embodiments are directed to tagging objects or primitives with attribute tags to facilitate the encoding process. Other embodiments are directed to codecs running on hardware and/or software.
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公开(公告)号:US20200005424A1
公开(公告)日:2020-01-02
申请号:US16515794
申请日:2019-07-18
Applicant: Intel Corporation
Inventor: Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Jill M. Boyce , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland , Keith W. Rowe , Altug Koker
IPC: G06T1/20 , G06T1/60 , G09G5/00 , H04N19/156 , G06F1/3206 , G06F1/3234
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
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公开(公告)号:US10402932B2
公开(公告)日:2019-09-03
申请号:US15488569
申请日:2017-04-17
Applicant: Intel Corporation
Inventor: Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Jill M. Boyce , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland , Keith W. Rowe , Altug Koker
IPC: H04N19/156 , G06T1/20 , G06T1/60 , G09G5/00 , G06F1/3206 , G06F1/3234 , G06F1/3212
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
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74.
公开(公告)号:US20190261000A1
公开(公告)日:2019-08-22
申请号:US15477000
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Jong Dae Oh , Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Hiu-Fai R. Chan , Joydeep Ray
IPC: H04N19/146 , H04N19/553
Abstract: Systems and methods may provide for occlusion detection in frame rate conversion. Detecting the occlusion allows frame rate conversion to be more accurately performed. In some embodiments, one or more stereoscopic depth cameras may be used to determine the depth of a moving object to more accurately determine the occlusion. In some embodiments, the compression ratio may be adjusted to balance the frame rate and power to help ensure compliance with a power budget. In at least some embodiments, the motion of a camera may be passed from a 3D render pipe to an encoder to avoid motion calculation and thereby saving power.
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公开(公告)号:US20180301095A1
公开(公告)日:2018-10-18
申请号:US15488602
申请日:2017-04-17
Applicant: Intel Corporation
Inventor: Arthur J. Runyan , Richmond Hicks , Nausheen Ansari , Narayan Biswal , Ya-Ti Peng , Abhishek R. Appu , Wen-Fu Kao , Sang-Hee Lee , Joydeep Ray , Changliang Wang , Satyanarayana Avadhanam , Scott Janus , Gary Smith , Nilesh V. Shah , Keith W. Rowe , Robert J. Johnston
Abstract: Often when there is a glare on a display screen the user may be able to mitigate the glare by tilting or otherwise moving the screen or changing their viewing position. However, when driving a car there are limited options for overcoming glares on the dashboard, especially when you are driving for a long distance in the same direction. Embodiments are directed to eliminating such glare. Other embodiments are related to mixed reality (MR) and filling in occluded areas.
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公开(公告)号:US20180292743A1
公开(公告)日:2018-10-11
申请号:US15483922
申请日:2017-04-10
Applicant: Intel Corporation
Inventor: Stanley J. Baran , Abhishek R. Appu , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Joydeep Ray
IPC: G03B35/10 , H04N19/139
Abstract: Systems and methods may provide for utilizing stereoscopic inputs to take advantage of a codec to improve encoding and processing efficiency. The left and right channels of the stereoscopic inputs provide inputs for views of the same image frames. The frames may be offset by the parallax effect. The systems and methods utilize similarities between the left and right channels to allow motions (i.e., motion vectors) related to an object in the scene for one view to be spatially translated for the other view based on known differences in distance and geometry to avoid the necessity to encode and process both channel views. The system and method thereby improves the encoding and processing efficiency of motion processes such as motion vectors, motion sampling, macroblock sampling, edge sampling and the like.
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公开(公告)号:US10097828B2
公开(公告)日:2018-10-09
申请号:US14567600
申请日:2014-12-11
Applicant: Intel Corporation
Inventor: Ximin Zhang , Sang-Hee Lee
IPC: H04N19/124 , H04N19/152 , H04N19/172 , H04N19/436 , H04N19/15 , H04N19/115
Abstract: Systems and methods for determining a target number of bits (target bitrate) for encoding a frame of video that will satisfy a buffer constraint in a parallel video encoder. The quantization parameter (QP) for a given encoding process may be determined for the frame based on the target bitrate to maintain a suitable average bitrate. In some embodiments, the bitrate used for one or more prior frame is estimated. In some embodiments, a buffer fullness update is made based on an estimated bitrate. In some embodiments, a bitrate to target for each frame is determined based on the frame type, estimated bitrate of a prior frame(s), and the updated buffer fullness.
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78.
公开(公告)号:US20180288435A1
公开(公告)日:2018-10-04
申请号:US15476989
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Jill M. Boyce , Sang-Hee Lee , Abhishek R. Appu , Wen-Fu Kao , Joydeep Ray , Ya-Ti Peng , Keith W. Rowe , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland
IPC: H04N19/593 , H04N19/597 , G06T11/00 , H04N13/04 , G03B37/04
Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
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公开(公告)号:US09942552B2
公开(公告)日:2018-04-10
申请号:US14737795
申请日:2015-06-12
Applicant: Intel Corporation
Inventor: Ximin Zhang , Sang-Hee Lee
IPC: H04N19/132 , H04N19/177 , H04N19/16 , H04N19/503 , H04N19/126 , H04N19/184 , H04N19/187 , H04N19/147 , H04N19/172 , H04N19/149 , H04N19/103
CPC classification number: H04N19/132 , H04N19/103 , H04N19/126 , H04N19/147 , H04N19/149 , H04N19/16 , H04N19/172 , H04N19/177 , H04N19/184 , H04N19/187 , H04N19/503
Abstract: Techniques related to video coding with low bitrates are discussed. Such techniques may include skipping coding of a picture of a group of pictures when an estimated coding bit cost of the picture is greater than an available coding bit limit for the picture and, when the estimated coding bit cost is not greater than the available coding bit limit, determining the coding skip indicator based on a picture type of the individual picture and a picture structure of the group of pictures.
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公开(公告)号:US09838710B2
公开(公告)日:2017-12-05
申请号:US14580931
申请日:2014-12-23
Applicant: Intel Corporation
Inventor: Sang-Hee Lee , James M. Holland , Lidong Xu , Hong Jiang
IPC: H04N7/12 , G06K9/00 , H04N19/513 , H04N19/543
CPC classification number: H04N19/521 , H04N19/43 , H04N19/533 , H04N19/543 , H04N19/56
Abstract: Techniques related to providing motion estimation for arbitrary pixel block shapes are discussed. Such techniques may include generating a distortion mesh for a pixel block based on multiple calls to a motion estimation such that the distortion mesh includes distortion values associated with regions of the pixel block, a seed motion vector, and candidate motion vectors, and determining a best motion vector for the pixel block based on the distortion mesh.
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