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公开(公告)号:US20230317853A1
公开(公告)日:2023-10-05
申请号:US18328788
申请日:2023-06-05
Applicant: Japan Display Inc.
Inventor: Hajime WATAKABE , Tomoyuki ITO , Toshihide JINNAI , lsao SUZUMURA , Akihiro HANADA , Ryo ONODERA
IPC: H01L29/786 , H01L27/12 , H01L29/24 , H01L29/423 , H01L29/49 , H01L21/02 , H01L21/426 , H01L21/4757 , H01L21/4763 , H01L29/66
CPC classification number: H01L29/78627 , H01L27/124 , H01L27/1251 , H01L29/24 , H01L29/42384 , H01L29/4908 , H01L29/78633 , H01L29/78675 , H01L29/7869 , H01L27/127 , H01L21/02178 , H01L21/02565 , H01L21/426 , H01L21/47573 , H01L21/47635 , H01L29/66969 , H01L27/1225 , G02F1/1368
Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
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公开(公告)号:US20230074655A1
公开(公告)日:2023-03-09
申请号:US17987887
申请日:2022-11-16
Applicant: Japan Display Inc.
Inventor: Toshihide JINNAI , Hajime WATAKABE , Akihiro HANADA , Ryo ONODERA , lsao SUZUMURA
IPC: G02F1/1362 , G02F1/1368 , H01L29/786 , H01L27/12 , H01L27/32
Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
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公开(公告)号:US20230007861A1
公开(公告)日:2023-01-12
申请号:US17859004
申请日:2022-07-07
Applicant: Japan Display Inc.
Inventor: Takeshi SAKAI , Hajime WATAKABE , Akihiro HANADA
IPC: H01L29/786 , H01L27/12
Abstract: According to one embodiment, a semiconductor device includes a first transistor which includes a an oxide semiconductor layer, and a second transistor connected to first and a second gate electrodes of the first transistor, wherein the oxide semiconductor layer is provided between the first and second gate electrodes in a cross-sectional view, the oxide semiconductor layer includes a first channel formation region overlapping the second gate electrode and a second channel formation region not overlapping the second gate electrode in a plan view, and a resistance value between the second gate electrode and the second transistor is higher than a resistance value between the first gate electrode and the second transistor.
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公开(公告)号:US20220231149A1
公开(公告)日:2022-07-21
申请号:US17575635
申请日:2022-01-14
Applicant: Japan Display Inc.
Inventor: Akihiro HANADA , Kentaro MIURA , Hajime WATAKABE , Masashi TSUBUKU , Toshinari SASAKI , Takaya TAMARU , Takeshi SAKAI
IPC: H01L29/66 , H01L21/02 , H01L29/40 , H01L21/3115
Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming an oxide semiconductor layer, forming a gate insulating layer in contact with the oxide semiconductor layer and covering the oxide semiconductor layer, and forming a gate electrode on the gate insulating layer so as to overlap the oxide semiconductor layer, and injecting boron through the gate electrode and the gate insulating layer after forming the gate electrode, wherein a boron concentration included in a region of the gate insulating layer overlapping the gate electrode is in a range of 1E+16 [atoms/cm3] or more.
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公开(公告)号:US20220149203A1
公开(公告)日:2022-05-12
申请号:US17579740
申请日:2022-01-20
Applicant: Japan Display Inc.
Inventor: Akihiro HANADA , Takuo KAITOH , Masashi TSUBUKU
IPC: H01L29/786
Abstract: The purpose of the present invention is to suppress a variation in a threshold voltage (Δ Vth) in a Thin Film Transistor (TFT) using an oxide semiconductor. The present invention takes a structure as follows to attain this purpose. A semiconductor device having TFT using an oxide semiconductor including: a channel region, a source region, a drain region, and a transition region between the channel region and the source region and between the channel region and the drain region, in which a resistivity of the transition region is smaller than that of the channel region, and larger than that of the source region or the drain region; a source electrode is formed overlapping the source region, and a drain electrode is formed overlapping the drain region; and a thickness of the transition region of the oxide semiconductor is larger than a thickness of the channel region of the oxide semiconductor.
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公开(公告)号:US20220128882A1
公开(公告)日:2022-04-28
申请号:US17509090
申请日:2021-10-25
Applicant: Japan Display Inc.
Inventor: Toshiki KANEKO , Akihiro HANADA
IPC: G02F1/16766 , H01L27/12 , G02F1/16756
Abstract: According to one embodiment, a display device includes a first oxide semiconductor, a second oxide semiconductor, a first source electrode contacting the first oxide semiconductor in a first opening, a first drain electrode contacting the first oxide semiconductor in a second opening, a second source electrode contacting the second oxide semiconductor in a third opening, and a second drain electrode contacting the second oxide semiconductor in a fourth opening. A length of a layer stack of the second insulating film and the first source electrode between the first opening and the second opening is greater than a length of a layer stack of the second insulating film and the second source electrode between the third opening and the fourth opening.
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公开(公告)号:US20220029026A1
公开(公告)日:2022-01-27
申请号:US17499908
申请日:2021-10-13
Applicant: Japan Display Inc.
Inventor: Hajime WATAKABE , Tomoyuki ITO , Toshihide JINNAI , lsao SUZUMURA , Akihiro HANADA , Ryo ONODERA
IPC: H01L29/786 , H01L21/02 , H01L27/12 , H01L29/66 , H01L21/4763 , H01L29/49 , H01L21/426 , H01L29/423 , H01L29/24 , H01L21/4757 , G02F1/1368
Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
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公开(公告)号:US20210074736A1
公开(公告)日:2021-03-11
申请号:US16996920
申请日:2020-08-19
Applicant: Japan Display Inc.
Inventor: Akihiro HANADA , Toshihide JINNAI , Hajime WATAKABE , Ryo ONODERA
IPC: H01L27/12 , H01L29/786 , G02F1/1362 , G02F1/1368
Abstract: The purpose of the present invention is to prevent the TFT in the semiconductor device is shorted by existence of a foreign substance. An example of the structure to solve the problem is: A semiconductor device comprising: a scan line extends in a first direction, a first signal line extends in a second direction, which crosses the first direction, a second signal line extends parallel to the first signal line, an electrode is disposed between the first signal line and the second signal line, wherein a first TFT connects with the second signal line in a vicinity of the second signal line, a second TFT connects with the electrode in a vicinity of the first signal line, the first TFT and the second TFT are formed from oxide semiconductors, the first TFT and the second TFT are connected in series.
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公开(公告)号:US20200264484A1
公开(公告)日:2020-08-20
申请号:US16787054
申请日:2020-02-11
Applicant: Japan Display Inc.
Inventor: Toshihide JINNAI , Hajime WATAKABE , Akihiro HANADA , Ryo ONODERA , lsao SUZUMURA
IPC: G02F1/1362 , G02F1/1368 , H01L27/32 , H01L29/786 , H01L27/12
Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
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公开(公告)号:US20190250443A1
公开(公告)日:2019-08-15
申请号:US16395491
申请日:2019-04-26
Applicant: Japan Display Inc.
Inventor: Hajime WATAKABE , Isao SUZUMURA , Hirokazu WATANABE , Akihiro HANADA
IPC: G02F1/1368 , H01L27/12 , H01L51/50 , H01L21/8234 , H01L29/786
Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a drain source electrode of the first TFT connects with the silicon (Si) via a first through hole, a drain source electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an ALO layer is formed on the metal films and the oxide semiconductor, the second source drain electrode and the metal films are connected via the second through hole formed in the AlO layer.
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