公开(公告)号：US09357010B1

公开(公告)日：2016-05-31

申请号：US14961665

申请日：2015-12-07

Applicant: Pure Storage, Inc.

Inventor： John Hayes ,  John Colgrove ,  John D. Davis

IPC: G06F12/02 ,  H04L29/08 ,  H04L12/933

CPC classification number: H04L67/1097 ,  G06F3/06 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0635 ,  G06F3/065 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0685 ,  G06F3/0688 ,  G06F3/0689 ,  G06F11/1068 ,  G06F11/108 ,  G06F11/2092 ,  G06F12/0246 ,  G06F13/4022 ,  G06F13/4282 ,  G06F2201/805 ,  G06F2201/845 ,  G06F2212/7206 ,  G06F2212/7207 ,  G11C29/52 ,  H03M13/154 ,  H04L12/40169 ,  H04L49/10 ,  H04L67/16

Abstract: A storage system is provided. The storage system includes a plurality of storage units, each of the plurality of storage units having storage memory for user data and a plurality of storage nodes, each of the plurality of storage nodes configured to have ownership of a portion of the user data. The storage system includes a first pathway, coupling the plurality of storage units such that each of the plurality of storage units can communicate with at least one other of the plurality of storage units via the first pathway without assistance from the plurality of storage nodes.

公开(公告)号：US09280193B2

公开(公告)日：2016-03-08

申请号：US14101050

申请日：2013-12-09

Applicant: Dell Products, LP

Inventor： Wayne R. Weilnau, Jr. ,  Elie A. Jreij

IPC: G06F11/00 ,  G06F1/30 ,  G06F1/32 ,  G06F11/20

CPC classification number: G06F1/30 ,  G06F1/3234 ,  G06F1/3287 ,  G06F11/2015 ,  G06F2201/845

Abstract: A server chassis includes an uninterruptible power supply, and a server including a controller. The uninterruptible power supply is configured to provide a reserve power when a primary power is lost, and to send a power loss signal when the primary power is lost. The controller is configured to receive a desired server uptime, to receive an indication that a power limit for the server is fixed or decreasing over the desired server, to receive the power loss signal from the uninterruptible power supply, to send a power capacity query to the uninterruptible power supply, to receive a reserve power capacity of the uninterruptible power supply in response to the power capacity query, to calculate the power limit for the server based on the reserve power capacity of the uninterruptible power supply and on the desired server uptime, and to enforce the power limit on the server.

公开(公告)号：US20160026539A1

公开(公告)日：2016-01-28

申请号：US14875197

申请日：2015-10-05

Applicant: NetApp Inc.

Inventor： Stephen Wu ,  Prathamesh Deshpande ,  Manan Patel

IPC: G06F11/14 ,  G06F3/06

CPC classification number: G06F11/1451 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/067 ,  G06F11/07 ,  G06F11/1438 ,  G06F11/1446 ,  G06F11/1464 ,  G06F11/1469 ,  G06F2201/845

Abstract: An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.

Abstract translation: 应用可以将数据存储到包括存储在多个存储系统上的多个卷的数据集。 应用程序可以请求数据集的数据集映像，数据集映像包括数据集的每个卷的卷映像。 数据集图像管理器与多个卷图像管理器并行地操作以产生数据集图像，每个卷映像管理器在存储系统上执行。 多个卷映像管理器通过执行所请求的操作并且并行地向数据集映像管理器发送响应来进行响应。 存储系统上的每个卷映像管理器可以管理并产生存储到存储系统的数据集的每个卷的卷映像。 如果数据集的任何卷的卷映像失败或超时期限到期，则执行清除过程以删除任何成功的卷映像。

公开(公告)号：US09208036B2

公开(公告)日：2015-12-08

申请号：US13090056

申请日：2011-04-19

Applicant: William C. Moyer

Inventor： William C. Moyer

IPC: G06F12/02 ,  G06F11/16 ,  G06F12/08 ,  G06F12/12

CPC classification number: G06F11/1658 ,  G06F11/1629 ,  G06F12/0848 ,  G06F12/126 ,  G06F2201/845 ,  G06F2212/1016 ,  G06F2212/1032

Abstract: To facilitate dynamic lockstep support, replacement states and/or logic used to select particular cache lines for replacement with new allocations in accord with replacement algorithms or strategies may be enhanced to provide generally independent replacement contexts for use in respective lockstep and performance modes. In some cases, replacement logic that may be otherwise conventional in its selection of cache lines for new allocations in accord with a first-in, first-out (FIFO), round-robin, random, least recently used (LRU), pseudo LRU, or other replacement algorithm/strategy is at least partially replicated to provide lockstep and performance instances that respectively cover lockstep and performance partitions of a cache. In some cases, a unified instance of replacement logic may be reinitialized with appropriate states at (or coincident with) transitions between performance and lockstep modes of operation.

Abstract translation: 为了促进动态锁步支持，可以增强用于根据替换算法或策略来选择用于替换新分配的特定高速缓存行的替换状态和/或逻辑，以提供用于相应锁步和执行模式的通常独立的替换上下文。 在某些情况下，根据先入先出（FIFO），循环，随机，最近最少使用（LRU），伪LRU的新分配来选择高速缓存行的替换逻辑 或其他替换算法/策略至少部分地复制以提供分别覆盖缓存的锁步和性能分区的锁步和性能实例。 在某些情况下，替换逻辑的统一实例可能会在性能和锁步操作模式之间（或与其一致）中的适当状态重新初始化。

公开(公告)号：US20150339073A1

公开(公告)日：2015-11-26

申请号：US14816831

申请日：2015-08-03

Applicant: Apple Inc.

Inventor： Avraham Poza Meir ,  Oren Golov ,  Sasha Paley ,  Ori Moshe Stern ,  Etai Zaltsman

IPC: G06F3/06 ,  G06F11/10

CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0688 ,  G06F3/0689 ,  G06F11/10 ,  G06F11/1048 ,  G06F11/1076 ,  G06F11/108 ,  G06F11/1402 ,  G06F11/3409 ,  G06F2201/845

Abstract: A method includes, in a memory controller that controls a memory, evaluating an available memory space remaining in the memory to write data. A redundant storage configuration is selected in the memory controller depending on the available memory space. Redundancy information is calculated over the data using the selected redundant storage configuration. The data and the redundancy information are written to the available memory space in the memory.

Abstract translation: 一种方法包括在控制存储器的存储器控​​制器中，评估存储器中剩余的可用存储器空间以写入数据。 根据可用的存储空间，在存储器控制器中选择冗余存储配置。 使用所选择的冗余存储配置对数据计算冗余信息。 将数据和冗余信息写入存储器中的可用存储空间。

公开(公告)号：US20150286544A1

公开(公告)日：2015-10-08

申请号：US14435786

申请日：2012-11-29

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Rachid M. Kadri

IPC: G06F11/20

CPC classification number: G06F11/2033 ,  G06F11/1064 ,  G06F11/2038 ,  G06F11/2043 ,  G06F11/2097 ,  G06F2201/845

Abstract: Examples disclose a multi-core circuit with a primary core associated with a primary portion of cache and a secondary core associated with a secondary portion of the cache. The secondary portion of the cache is redundant to the primary portion of the cache. Further, the examples of the multi-core circuit provide a control circuit to enable the secondary core for operation in response to a fault condition detected at the primary core, wherein the secondary portion of cache is enabled with the secondary core to resume an operation of the primary core.

Abstract translation: 示例公开了具有与高速缓存的主要部分相关联的主核心的多核电路和与高速缓存的次级部分相关联的次级核心。 缓存的次级部分对于高速缓存的主要部分是冗余的。 此外，多核电路的示例提供了控制电路，以使辅助核心能够响应于在主核心处检测到的故障状况而进行操作，其中高速缓存的次级部分能够被辅助核心恢复到 主要核心。

公开(公告)号：US09086977B2

公开(公告)日：2015-07-21

申请号：US13090057

申请日：2011-04-19

Applicant: William C. Moyer

Inventor： William C. Moyer

IPC: G06F12/08 ,  G06F11/16 ,  G06F12/12

CPC classification number: G06F12/0848 ,  G06F11/1629 ,  G06F11/1658 ,  G06F12/0815 ,  G06F12/126 ,  G06F2201/845 ,  G06F2212/1016

Abstract: Cache storage may be partitioned in a manner that dedicates a first portion of the cache to lockstep mode execution, while providing a second (or remaining) portion for non-lockstep execution mode(s). For example, in embodiments that employ cache storage organized as a set associative cache, partition may be achieved by reserving a subset of the ways in the cache for use when operating in lockstep mode. Some or all of the remaining ways are available for use when operating in non-lockstep execution mode(s). In some embodiments, a subset of the cache sets, rather than cache ways, may be reserved in a like manner, though for concreteness, much of the description that follows emphasizes way-partitioned embodiments.

Abstract translation: 高速缓存存储器可以以专用于高速缓存的第一部分以锁定模式执行的方式进行分区，同时为非锁步执行模式提供第二（或剩余）部分。 例如，在使用被组织为集合关联高速缓存的高速缓存存储器的实施例中，可以通过在高速缓存中保留用于在锁步模式下操作时使用的方式的子集来实现分区。 当在非锁步执行模式下运行时，部分或全部剩余方式可用。 在一些实施例中，高速缓存集的子集而不是缓存方式可以以类似的方式保留，但是为了具体性，下面的大部分描述强调了方式划分的实施例。

公开(公告)号：US20150039944A1

公开(公告)日：2015-02-05

申请号：US13957851

申请日：2013-08-02

Applicant: Infineon Technologies AG

Inventor： Antonio Vilela ,  Simon Cottam

IPC: G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/16 ,  G06F11/1637 ,  G06F11/1654 ,  G06F11/167 ,  G06F11/1675 ,  G06F11/2221 ,  G06F11/277 ,  G06F2201/845

Abstract: A system and method for direct memory access (DMA) operation provides for receiving DMA requestors, assigning the received DMA requestors to one or more of a plurality of DMA engines for processing the received DMA requestors, and if one of the received DMA requestors is a safety requestor, assigning the safety requestor to at least two DMA engines of the plurality of DMA engines for processing the safety requestor, disabling a bus interface for coupling at least one DMA engine of the at least two DMA engines to memories, comparing the outputs of the at least two DMA engines, and generating an error message if the comparison of the outputs of the at least two DMA engines are different from each other.

Abstract translation: 用于直接存储器访问（DMA）操作的系统和方法提供接收DMA请求者，将接收的DMA请求者分配给多个DMA引擎中的一个或多个以用于处理所接收的DMA请求者，并且如果所接收的DMA请求者之一是 将所述安全请求者分配给所述多个DMA引擎中的至少两个DMA引擎以处理所述安全请求者，禁用用于将所述至少两个DMA引擎的至少一个DMA引擎耦合到存储器的总线接口，将所述至少两个DMA引擎的输出进行比较 所述至少两个DMA引擎，并且如果所述至少两个DMA引擎的输出的比较彼此不同，则产生错误消息。

公开(公告)号：US20140359236A1

公开(公告)日：2014-12-04

申请号：US13903752

申请日：2013-05-28

Applicant: NetApp, Inc.

Inventor： Stephen Wu ,  Prathamesh Deshpande ,  Manan Patel

IPC: G06F3/06

CPC classification number: G06F11/1451 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0652 ,  G06F3/067 ,  G06F11/07 ,  G06F11/1438 ,  G06F11/1446 ,  G06F11/1464 ,  G06F11/1469 ,  G06F2201/845

Abstract: An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.

Abstract translation: 应用可以将数据存储到包括存储在多个存储系统上的多个卷的数据集。 应用程序可以请求数据集的数据集映像，数据集映像包括数据集的每个卷的卷映像。 数据集图像管理器与多个卷图像管理器并行地操作以产生数据集图像，每个卷映像管理器在存储系统上执行。 多个卷映像管理器通过执行所请求的操作并且并行地向数据集映像管理器发送响应来进行响应。 存储系统上的每个卷映像管理器可以管理并产生存储到存储系统的数据集的每个卷的卷映像。 如果数据集的任何卷的卷映像失败或超时期限到期，则执行清除过程以删除任何成功的卷映像。

公开(公告)号：US20140032860A1

公开(公告)日：2014-01-30

申请号：US14110786

申请日：2011-04-21

Applicant: Hiromichi Yamada ,  Nobuyasu Kanekawa ,  Teruaki Sakata ,  Kesami Hagiwara ,  Yuichi Ishiguro

Inventor： Hiromichi Yamada ,  Nobuyasu Kanekawa ,  Teruaki Sakata ,  Kesami Hagiwara ,  Yuichi Ishiguro

IPC: G06F12/02

CPC classification number: G06F12/02 ,  G06F11/1641 ,  G06F11/167 ,  G06F11/1687 ,  G06F2201/845

Abstract: First data to be written which is output from a function module (2) is supplied to a built-in memory (3) and a first buffer memory (11), and second data to be written which is output from the function module (2) is supplied to the built-in memory (3) and a second buffer memory (12). The first and second FIFO memories (13, 14) select and store data items having a predetermined number of outputs from a plurality of first and second output data items which are sequentially output from the first and second buffer memories (11, 12), and do not select other data items. A comparator (15) compares the data items having the predetermined number of outputs which are selected and are output by the first and second FIFO memories (13, 14) with each other.

Abstract translation: 从功能模块（2）输出的要写入的第一数据被提供给内置存储器（3）和第一缓冲存储器（11），以及从功能模块（2）输出的要写入的第二数据 ）被提供给内置存储器（3）和第二缓冲存储器（12）。 第一和第二FIFO存储器（13,14）从从第一和第二缓冲存储器（11,12）顺次输出的多个第一和第二输出数据项中选择并存储具有预定数量的输出的数据项，以及 不要选择其他数据项。 比较器（15）将由第一和第二FIFO存储器（13,14）输出的具有预定数量的输出的数据项彼此进行比较。