System and method for a blood flow simulator
    83.
    发明授权

    公开(公告)号:US10672298B2

    公开(公告)日:2020-06-02

    申请号:US15707914

    申请日:2017-09-18

    Abstract: A blood flow simulator generates a compression and expansion in a test fluid that emulates the pressure waveform created by a heartbeat in blood flow. The blood flow simulator stores a plurality of pressure waveform files that include actual data recorded from a heartbeat, arterial pressure waveform, or venous pressure waveform. One or more of the pressure waveform files may be selected and the pressure waveform file is used by the blood flow simulator 100 to generate a pressure waveform in pressurized fluid. The pressurized fluid flows through a test site, such as a surrogate body part or an optical window or other component with material having similar properties to human tissue. Various target substances may also be added to the fluid in known concentrations for testing and configuration of medical devices at the test site.

    SYSTEM AND METHOD FOR MOTION DETECTION USING A PPG SENSOR

    公开(公告)号:US20200004336A1

    公开(公告)日:2020-01-02

    申请号:US16570612

    申请日:2019-09-13

    Inventor: Robert Newberry

    Abstract: A photoplethysmography (PPG) circuit obtains PPG signals at one or more wavelengths. The PPG signal is processed to identify motion artifacts. The motion artifacts are correlated with predetermined PPG signal patterns associated with movement of a body part or a control command for a user device. The PPG signals may thus be used to detect movement of the body part or determine a control command. A user device may be controlled in response to the determined control command.

    Apparatuses and methods for cooling high density arrays of non-volatile memory mass storage devices

    公开(公告)号:US10251315B1

    公开(公告)日:2019-04-02

    申请号:US15959127

    申请日:2018-04-20

    Abstract: One feature pertains to cooling of a high density array of non-volatile memory mass storage devices within a computer enclosure. A coolant is moved through the enclosure through two separate air paths, each serving approximately half of the mass storage devices. The two air paths are interleaved in a central duct ported to a frontal and a rear plenum. The central duct contains two groups of fans with a flow axis perpendicular to the plane of the server enclosure but with opposite flow direction with the two groups vertically offset relative to each other. The two paths are separated from each other through dividers. Both paths intake coolant from the cold isle and exhaust the coolant to the hot isle. The non-volatile memory mass storage devices include electromechanical and solid state devices.

    Method for forming hole plug
    86.
    发明授权

    公开(公告)号:US10237983B2

    公开(公告)日:2019-03-19

    申请号:US14998135

    申请日:2015-12-23

    Abstract: A method for forming a hole plug in a laminate structure is provided. A laminate structure, is formed, including at least a dielectric layer and a first conductive foil on a first side of the dielectric layer. An unpierced or blind hole is formed in the laminate structure extending toward the first conductive foil from a second side of the dielectric layer and at least partially through the dielectric layer, the hole having a hole depth to hole diameter aspect ratio of less than twenty (20) to one (1). In yet another example, the hole aspect ratio may be less than one (1) to one (1). Via fill ink may then be deposited in the hole. The via fill ink is then dried and/or cured to form a hole plug.

    ULTRA THIN DIELECTRIC PRINTED CIRCUIT BOARDS WITH THIN LAMINATES AND METHOD OF MANUFACTURING THEREOF

    公开(公告)号:US20190021177A1

    公开(公告)日:2019-01-17

    申请号:US16036913

    申请日:2018-07-16

    Abstract: A method for making an ultra-thin dielectric printed circuit board (PCB) is provided. A first side of a first conductive layer is removably coupled to a disposable base. A first ultra-thin dielectric layer and a second conductive layer are laminated to a second side of the first conductive layer, where the first ultra-thin dielectric layer is positioned between the first and second conductive layers, and the first ultra-thin dielectric layer is thinner than at least one of the first conductive layer and the second conductive layer. The second conductive layer may then be patterned to form electrical paths. The patterned second conductive layer is then filled with a dielectric filler. One or more conductive layers and one or more ultra-thin dielectric layers may then be coupled to the second conductive layer. The disposable base may then be detached from the first conductive layer.

    METHODS OF FORMING SEGMENTED VIAS FOR PRINTED CIRCUIT BOARDS

    公开(公告)号:US20180317327A1

    公开(公告)日:2018-11-01

    申请号:US15963980

    申请日:2018-04-26

    Abstract: Novel methods for forming a printed circuit board (PCB) having one or more segmented vias are provided, including improved methods of removing the catalyst after the plating process when forming a segmented via in the PCB. After the electroless plating, excess catalyst on the surface of the plating resist is removed using a catalyst remover, such as an acidic solution that includes at least nitrite or nitrite ion and halogen ion, or the catalyst remover may be an etchant for plating resist, such as alkaline permanganate compound solution or plasma gas comprising at least one of oxygen, nitrogen, argon and tetrafluoromethane, or a mixture of at least two of these gasses. After removal of the excess catalyst, electrolytic plating is then applied to the through holes and the outer layer circuit or signal traces are formed. That is, the etching of paths on the conductive foils/layers of the core structure.

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