公开(公告)号：US20190179563A1

公开(公告)日：2019-06-13

申请号：US16020010

申请日：2018-06-27

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE ,  Jang-Hyun KIM

IPC: G06F3/06

Abstract: A method for operating a memory system having a superblock that includes a plurality of physical blocks, each associated with an access frequency number identifying the number of times the corresponding physical block has been accessed, the method includes: updating the largest access frequency number among the access frequency numbers of the plurality of physic& blocks, as a number of times that the superblock is accessed, which is referred to as a superblock access frequency number; and performing a read reclaim operation on the superblock based on the superblock access frequency number.

公开(公告)号：US20190108891A1

公开(公告)日：2019-04-11

申请号：US15968164

申请日：2018-05-01

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G11C29/38 ,  G11C29/44

CPC classification number: G11C29/38 ,  G11C16/0483 ,  G11C29/44 ,  G11C2029/0409

Abstract: A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages that store data; and a controller suitable for performing command operations corresponding to a plurality of commands received from a host on the memory blocks, detecting performance results of the command operations performed on the memory blocks, detecting, among the memory blocks, first memory blocks where performance of the command operations failed as bad blocks, and copying and storing valid data in the first memory blocks in second memory blocks of the memory blocks.

公开(公告)号：US20190107961A1

公开(公告)日：2019-04-11

申请号：US15993092

申请日：2018-05-30

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

Abstract: A memory system includes: a memory device that includes a plurality of memory blocks, each of which includes a plurality of pages that store data; and a controller suitable for checking erase states of the plurality of memory blocks, performing a foreground operation and a background operation on the plurality of memory blocks based on the erase states, and storing the erase states in the plurality of memory blocks as checkpoint information.

公开(公告)号：US20190073295A1

公开(公告)日：2019-03-07

申请号：US15911570

申请日：2018-03-05

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F12/02 ,  G06F9/48 ,  G06F9/50 ,  G06F3/06

Abstract: A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages for storing data; and a controller that includes a first memory, wherein the controller performs a foreground operation and a background operation onto the memory blocks, checks priorities and weights for the foreground operation and the background operation, schedules queues corresponding to the foreground operation and the background operation based on the priorities and the weights, allocates regions corresponding to the scheduled queues to the first memory, and performs the foreground operation and the background operation through the regions allocated to the first memory.

公开(公告)号：US20190073126A1

公开(公告)日：2019-03-07

申请号：US15946358

申请日：2018-04-05

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

Abstract: A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages that store data; and a controller suitable for performing command executions corresponding to a plurality of commands received from a host on the memory blocks, checking first parameters for the memory blocks according to the command executions, selecting first memory blocks among the memory blocks based on the first parameters, performing a copy operation on the first memory blocks, checking second parameters for second memory blocks among the memory blocks, and selecting candidate memory blocks based on the second parameters.

公开(公告)号：US20180101454A1

公开(公告)日：2018-04-12

申请号：US15605257

申请日：2017-05-25

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F11/20 ,  G06F3/06

CPC classification number: G06F11/2017 ,  G06F3/0604 ,  G06F3/0614 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0685 ,  G06F11/1068 ,  G06F11/2094 ,  G06F2201/85

Abstract: A memory system includes: a non-volatile memory device that includes a plurality of memory blocks each of which includes a plurality of pages; and a controller suitable for programming write data together with corresponding write order information in the plurality of the pages during a write operation, wherein when two or more open blocks are detected among the plurality of the memory blocks during a recovery operation, the controller generates an order table where physical page numbers of the pages of the open blocks are arrayed based on the write order information and determines at least one recovery target page among pages of the open blocks based on the order table.

公开(公告)号：US20180081576A1

公开(公告)日：2018-03-22

申请号：US15603519

申请日：2017-05-24

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/061 ,  G06F3/0614 ,  G06F3/064 ,  G06F3/0647 ,  G06F3/065 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0688

Abstract: A memory system may include: a memory device including a plurality of memory blocks each memory block having a plurality of pages; and a controller suitable for checking parameters and deviations of the parameters for the respective memory blocks, which are recorded in a count information, and selecting source memory blocks among the memory blocks based on a result of the checking.

公开(公告)号：US20170337972A1

公开(公告)日：2017-11-23

申请号：US15407027

申请日：2017-01-16

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G11C16/16 ,  G11C16/10 ,  G06F3/06 ,  G11C16/34 ,  G11C16/26

CPC classification number: G11C16/16 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/068 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/20 ,  G11C29/42 ,  G11C29/76 ,  G11C2029/0407

Abstract: A memory system may include a memory device including a plurality of memory blocks each memory block including a plurality of pages; and a controller suitable for non-sequentially selecting some pages among a plurality of pages included in an open block among the plurality of blocks, checking a program state or an erase state of each of the selected pages, and searching for a boundary page between the program state pages and the erase state pages among the plurality of pages.

公开(公告)号：US20170185463A1

公开(公告)日：2017-06-29

申请号：US15179347

申请日：2016-06-10

Applicant: SK hynix Inc.

Inventor： Kwang-Su KIM ,  Jong-Min LEE

IPC: G06F11/07 ,  G06F11/10 ,  G11C29/50 ,  G11C29/42

CPC classification number: G06F11/076 ,  G06F11/1048 ,  G06F11/1072 ,  G11C29/42 ,  G11C29/44 ,  G11C29/50004 ,  G11C29/52 ,  G11C29/76 ,  G11C2029/0409

Abstract: An operating method of a memory system including a plurality of memory blocks may include grouping the pages of a selected memory block among the plurality of memory blocks based on a program time, sequentially performing a test read on the groups of the pages, detecting an error in the pages of the test-read groups, and reprogramming a page selected based on a result of the error detection.

公开(公告)号：US20170147259A1

公开(公告)日：2017-05-25

申请号：US15144451

申请日：2016-05-02

Applicant: SK hynix Inc.

Inventor： Jong-Min LEE

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0673 ,  G06F12/0292 ,  G06F12/1009 ,  G06F2212/65 ,  G06F2212/657

Abstract: A memory system may include a memory device including a plurality of memory blocks each memory block including a plurality of pages, and a controller suitable for storing data in a first memory block of the memory blocks, generating map data for the stored data in the first memory block by sorting map segments of the map data based on logical information of the data, and storing the map data in a second memory block of the memory blocks.