Abstract:
An optical fiber connector includes a housing unit and a coupling unit. The housing unit includes an outer shell. The coupling unit includes a hollow seat assembled to the outer shell, a coupling seat assembled to the hollow seat and disposed in the outer shell, a core tube having a front portion disposed in the hollow seat and a rear portion proximate to the coupling seat, and a biasing member for providing a biasing force to bias the core tube away from the coupling seat.
Abstract:
A power converter module is disclosed, which is an all-digital module. The power converter module includes a reference voltage generation unit, a voltage loop control unit, a current loop control unit, an input voltage compensation unit, and a pulse width modulation generation unit, to transfer input power to stable output power for providing power to an external loading device through driving bridge switch unit with external driver. The voltage loop control unit and the current loop control unit contain a proportion-integral-differentiation controller for receiving signal related to voltage and current of loading device to form voltage control loop and current control loop. The pulse width modulation generation unit contains function of deciding necessary stop time to improve quality of output power and decrease the effect of input power and loading variation, and to provide stable sine-waveform output power to the external loading device.
Abstract:
A digital power factor correction device is provided, which is an all-digital control module. The digital power factor correction device includes a voltage loop control unit, an input power control unit, a current loop control unit, and a pulse width modulation generation unit, to perform power factor correction for minimizing the phase difference between input current and input voltage through adjusting input current with an external driver and a switch unit. The voltage loop control unit and the current loop control unit contain a proportion-integral-differentiation controller to form a voltage control loop and a current control loop, respectively. The input power control unit adjusts current waveform according to the input power, while the pulse width modulation generation unit determines the stop time of pulse width modulation to produce a pulse width modulation signal, to control the external driver and the switch unit for eliminating loading effect.
Abstract:
A digital power factor correction device is provided, which is an all-digital control module. The digital power factor correction device includes a voltage loop control unit, an input power control unit, a current loop control unit, and a pulse width modulation generation unit, to perform power factor correction for minimizing the phase difference between input current and input voltage through adjusting input current with an external driver and a switch unit. The voltage loop control unit and the current loop control unit contain proportion-integral-differentiation controller to form voltage control loop and current control loop, respectively. The input power control unit adjusts current waveform according to the input power, while the pulse width modulation generation unit decides stop time of pulse width modulation to produce a pulse width modulation signal, to control the external driver and the switch unit for eliminating loading effect.
Abstract:
A rotary spindle head for a machine tool, comprises a rotary spindle unit, a fork-shaped spindle base, and a driving unit, wherein the fork-shaped spindle base is disposed to the machine tool and is rotatably connecting to the rotary spindle unit, while the driving unit, having a torque motor and a planetary-gear speed reducer coaxially coupled to the torque motor, is coupled to the fork-shaped spindle base. The planetary-gear speed reducer is coupled to the rotary spindle unit for driving the rotary spindle unit to rotate within the fork-shaped spindle base. Since the planetary-gear speed reducer has lower speed reduction ratio and has a speed reducing design with the coaxial arrangement of the input/output shafts, it is capable of magnifying the torque of the torque motor for retaining a higher rotation speed so that the rotary spindle head can be utilized for high-speed light-machining and high-torque heavy-machining.
Abstract:
The present invention discloses a penta-mirror multi-reflection image scanning module including at least one light source, five reflecting mirrors, a pickup lens, an image sensor, and a frame. The reflecting mirrors reflect a light beam from a document and a plurality of reflecting mirrors reflect a light beam of the document twice or more to change the light beam direction along light path, and satisfy specific optical conditions. The total tracking length (TTL) may be adjusted through an arrangement of the distance of the five reflecting mirrors, but may not be adjusted through the angle of the five reflecting mirrors. Therefore, the present invention not only increases the field of depth by increasing the length of optical path in a limited space, but also facilitates the assembling to adapt to different tracking lengths.
Abstract:
An operating method of a non-volatile memory is provided. The non-volatile memory includes plural memory cells. Each memory cell includes a charge storage structure, a gate, and a source and a drain disposed in the well on the both sides of the gate. During an erasing operation, a first voltage is applied to the source of the selected memory cell, a second voltage is applied to the gate of each selected memory cell, and a third voltage is applied to the well; and the drain of the selected memory cell is floated, so that the selected memory cell is erased. In the meantime, the fourth voltage is applied to the drain of each unselected memory cell, the fifth voltage is applied to the gate of the unselected memory cell, and the source of the unselected memory cell is floated to prevent the unselected memory cell from being erased.
Abstract:
A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit.
Abstract:
A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit.
Abstract:
A nonvolatile memory device having a self reprogramming function is provided. The nonvolatile memory device includes a memory cell, a first transistor, a second transistor, and a latch circuit. The memory cell is for data storage. The first transistor receives a reading control signal at a gate. And a first source/drain is electrically coupled to the memory cell. The second transistor receives a reset control signal at a gate. A source/drain is electrically coupled to a second source/drain of the first transistor, and a second source/drain of the second transistor is grounded. In addition, the electrical characteristics of the second transistor are opposite to that of the first transistor. The latch circuit includes a latch input terminal and a latch output terminal. In which, the latch input terminal is electrically coupled to the second source/drain of the first transistor and the first source/drain of the second transistor.