中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.013 seconds)

    Electrical connectors incorporating low friction coatings and methods for making them
    2.
    发明授权
    Electrical connectors incorporating low friction coatings and methods for making them 失效
    具有低摩擦涂层的电连接器及其制造方法

    公开(公告)号：US06923692B2

    公开(公告)日：2005-08-02

    申请号：US10420336

    申请日：2003-04-22

    Applicant: Daniel A. Niebauer

    Inventor： Daniel A. Niebauer

    IPC: B32B15/01 ,  C23C14/06 ,  H01R13/03 ,  B32B15/00 ,  C23C14/16 ,  C23C14/34

    CPC classification number: B32B15/01 ,  C23C14/0623 ,  H01R13/03 ,  Y10S428/929 ,  Y10T29/49204 ,  Y10T428/12493 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722 ,  Y10T428/12826 ,  Y10T428/1291

    Abstract: Electrical connectors incorporate a composite coating of molybdenum disulfide and a metal, preferably tin, for one or both of the contact surfaces of the electrical connector. The coating provides for a low coefficient of friction, low contact resistance, and good electrical conductivity, as well as good mechanical properties. The coating also reduces the insertion force of the electrical connectors, thereby increasing the number of possible terminal pairs and/or reducing terminal bending and breakage for a manually mated connector. The coating can be deposited on copper, tin-plated copper, tin alloy-plated copper or other metallic substrates, using any of several physical vapor deposition methods.

    Abstract translation: 电连接器包括二硫化钼和金属（优选锡）的复合涂层，用于电连接器的一个或两个接触表面。 该涂层提供低摩擦系数，低接触电阻和良好的导电性以及良好的机械性能。 涂层还降低了电连接器的插入力，从而增加了可能的端子对的数量和/或减少了手动配合连接器的端子弯曲和断裂。 可以使用几种物理气相沉积方法中的任何一种将涂层沉积在铜，镀锡铜，镀锡合金的铜或其它金属基底上。

    Partial reflector
    4.
    发明授权
    Partial reflector 失效
    部分反射器

    公开(公告)号：US06231992B1

    公开(公告)日：2001-05-15

    申请号：US09148839

    申请日：1998-09-04

    Applicant: Daniel A. Niebauer ,  Barry F. T. Bolker

    Inventor： Daniel A. Niebauer ,  Barry F. T. Bolker

    IPC: B32B1504

    CPC classification number: G02B5/0858

    Abstract: An improved partial reflector is disclosed in which the reflector is configured to provide selected levels of reflectance, transmittance and efficiency that are substantially uniform over the visible wavelength range of 400 to 700 nanometers. This result is achieved using a special three-layer coating that includes a metal layer sandwiched between two metal oxide dielectric layers having relatively high refractive indices >2.0. Advantageously, the three layers all incorporate the same metal, preferably niobium.

    Abstract translation: 公开了一种改进的部分反射器，其中反射器被配置为提供在400至700纳米的可见波长范围内基本上均匀的选择的反射率，透射率和效率水平。 该结果使用特殊的三层涂层来实现，该三层涂层包括夹在具有相对较高折射率> 2.0的两个金属氧化物介电层之间的金属层。 有利地，三层都包含相同的金属，优选铌。

    Process for making multifunction integrated optics chips having high electro-optic coefficients
    5.
    发明授权
    Process for making multifunction integrated optics chips having high electro-optic coefficients 失效
    制造具有高电光系数的多功能集成光学芯片的工艺

    公开(公告)号：US5193136A

    公开(公告)日：1993-03-09

    申请号：US799716

    申请日：1991-11-26

    Applicant: Chin L. Chang ,  Daniel A. Niebauer ,  Albert Choi

    Inventor： Chin L. Chang ,  Daniel A. Niebauer ,  Albert Choi

    IPC: G02B6/134

    CPC classification number: G02B6/1345

    Abstract: Methods for making proton-exchanged, multi-function integrated optics chips, preferably chips based on the stable, rhombohedral lithium niobate structure, and having substantially diffused protons, while being substantially free of microcracking and of internal stresses that can result in microcracking, and yet having optimally high electro-optic coefficients, include the steps of: forming a multi-function integrated optics chip substrate from a substrate such as lithium niobate; affixing a removable mask or mask pattern to at least one surface of the chip to form one or more proton-exchanged patterns of desired size and shape at the surface of the chip; treating the masked chip with a proton-exchanging acid such as benzoic acid at a temperature and for a time sufficient to cause substantial proton exchange at and below the unmasked surface of the chip, but for a time insufficient to create any microcracking or internal stresses that lead to microcracking in the chip; removing the mask or mask pattern from the chip; and thermally annealing the chip, in an oxygen-containing environment, at a temperature and for a time sufficient to diffuse the hydrogen ions at and near the surface of the chip substantially below its surface, at a temperature and for a time sufficient to optimize the polarization extinction ratio of the chip, and for a time and at a temperature sufficient to restore and to optimize the electro-optic coefficient and to reduce light and propagation losses in the chip.

    Abstract translation: 用于制造质子交换的多功能集成光学芯片的方法，优选基于稳定的菱面体铌酸锂结构的芯片，并且具有基本上扩散的质子，同时基本上没有可能导致微裂纹的微裂纹和内部应力，然而 具有最佳的电光系数包括以下步骤：从诸如铌酸锂的衬底形成多功能集成光学芯片衬底; 将可移除的掩模或掩模图案附着到所述芯片的至少一个表面，以在所述芯片的表面处形成一个或多个所需尺寸和形状的质子交换图案; 在质子交换的酸如苯甲酸的温度和时间下处理掩蔽的芯片，足以在芯片的未掩模表面和下方引起基本的质子交换，但不足以产生任何微裂纹或内部应力， 导致芯片中的微裂纹; 从芯片去除掩模或掩模图案; 并且在含氧环境中，在足以使基片表面附近和附近的氢离子扩散到基本上低于其表面的温度和时间的温度和时间足以优化所述芯片， 并且在足以恢复并优化电光系数并减少芯片中的光和传播损耗的时间和温度下达到极化消光比。

Patent Agency Ranking