公开(公告)号：US20090286373A1

公开(公告)日：2009-11-19

申请号：US12466391

申请日：2009-05-15

Applicant: Dexter Xueming TAN ,  Benjamin COLOMBEAU ,  Clark Kuang Kian ONG ,  Sai Hooi YEONG ,  Chee Mang NG ,  Kin Leong PEY

Inventor： Dexter Xueming TAN ,  Benjamin COLOMBEAU ,  Clark Kuang Kian ONG ,  Sai Hooi YEONG ,  Chee Mang NG ,  Kin Leong PEY

IPC: H01L21/336 ,  H01L21/322

CPC classification number: H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method for fabricating a semiconductor device is presented. The method includes providing a substrate and forming a gate stack over the substrate. A first laser processing to form vacancy rich regions within the substrate on opposing sides of the gate stack is performed. The vacancy rich regions have a first depth from a surface of the substrate. A first implant causing end of range defect regions to be formed on opposing sides of the gate stack at a second depth from the surface of the substrate is also carried out, wherein the first depth is proximate to the second depth.

Abstract translation: 本发明提供一种制造半导体器件的方法。 该方法包括提供衬底并在衬底上形成栅叠层。 执行在栅极堆叠的相对侧上在衬底内形成空位丰富区域的第一激光处理。 空位丰富区域具有从基板表面的第一深度。 还执行第一种植入物，其在基板的表面的第二深度处形成在栅叠层的相对侧上形成范围缺陷区域的端部，其中第一深度接近第二深度。

公开(公告)号：US08922003B2

公开(公告)日：2014-12-30

申请号：US13353336

申请日：2012-01-19

Applicant: Dexter Xueming Tan ,  Yoke King Chin ,  Kin Leong Pey

Inventor： Dexter Xueming Tan ,  Yoke King Chin ,  Kin Leong Pey

IPC: H01L23/48 ,  H01L21/28 ,  H01L21/26

CPC classification number: H01L29/0847 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/665 ,  H01L29/66507 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method for forming a device is disclosed. A substrate with a contact region is provided. Vacancy defects are formed in the substrate. The vacancy defects have a peak concentration at a depth DV. A metal based contact is formed in the contact region. The metal based contact has a depth DC which is equal to about DV. The vacancy defects lower the resistance of the metal based contact with the substrate.

Abstract translation: 公开了一种用于形成装置的方法。 提供具有接触区域的基板。 在基板中形成空位缺陷。 空位缺陷在深度DV具有峰值浓度。 在接触区域中形成金属基触点。 基于金属的触点具有等于约DV的深度DC。 空位缺陷降低了与基板的金属基接触的电阻。

公开(公告)号：US20130187264A1

公开(公告)日：2013-07-25

申请号：US13353336

申请日：2012-01-19

Applicant: Dexter Xueming TAN ,  Yoke King CHIN ,  Kin Leong PEY

Inventor： Dexter Xueming TAN ,  Yoke King CHIN ,  Kin Leong PEY

IPC: H01L23/48 ,  H01L21/28 ,  H01L21/26

CPC classification number: H01L29/0847 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/665 ,  H01L29/66507 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method for forming a device is disclosed. A substrate with a contact region is provided. Vacancy defects are formed in the substrate. The vacancy defects have a peak concentration at a depth DV. A metal based contact is formed in the contact region. The metal based contact has a depth DC which is equal to about DV. The vacancy defects lower the resistance of the metal based contact with the substrate.

Abstract translation: 公开了一种用于形成装置的方法。 提供具有接触区域的基板。 在基板中形成空位缺陷。 空位缺陷在深度DV具有峰值浓度。 在接触区域中形成金属基触点。 基于金属的触点具有等于约DV的深度DC。 空位缺陷降低了与基板的金属基接触的电阻。

公开(公告)号：US08101487B2

公开(公告)日：2012-01-24

申请号：US12466391

申请日：2009-05-15

Applicant: Dexter Xueming Tan ,  Benjamin Colombeau ,  Clark Kuang Kian Ong ,  Sai Hooi Yeong ,  Chee Mang Ng ,  Kin Leong Pey

Inventor： Dexter Xueming Tan ,  Benjamin Colombeau ,  Clark Kuang Kian Ong ,  Sai Hooi Yeong ,  Chee Mang Ng ,  Kin Leong Pey

IPC: H01L21/336 ,  H01L21/3205 ,  H01L21/4763

CPC classification number: H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method for fabricating a semiconductor device is presented. The method includes providing a substrate and forming a gate stack over the substrate. A first laser processing to form vacancy rich regions within the substrate on opposing sides of the gate stack is performed. The vacancy rich regions have a first depth from a surface of the substrate. A first implant causing end of range defect regions to be formed on opposing sides of the gate stack at a second depth from the surface of the substrate is also carried out, wherein the first depth is proximate to the second depth.

Abstract translation: 提出了一种制造半导体器件的方法。 该方法包括提供衬底并在衬底上形成栅叠层。 执行在栅极堆叠的相对侧上在衬底内形成空位丰富区域的第一激光处理。 空位丰富区域具有从基板表面的第一深度。 还执行第一种植入物，其在基板的表面的第二深度处形成在栅堆叠的相对侧上形成范围缺陷区域的端部，其中第一深度接近第二深度。