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公开(公告)号:US10098242B2
公开(公告)日:2018-10-09
申请号:US14388400
申请日:2013-03-28
Applicant: I Lin Tseng , Tzu Chun Chen
Inventor: I Lin Tseng , Tzu Chun Chen
IPC: H01K3/10 , H05K3/46 , H05K3/00 , H05K3/18 , H05K3/38 , H05K3/42 , H05K1/02 , H05K1/11 , H05K3/10 , B23K26/384 , H05K3/02
Abstract: A method for preparing a conductive circuit can begin with the preparation of a non-conductive substrate having a top surface and a bottom surface, and then utilizing a pulse laser to create a top circuit pattern upon the top surface, a bottom circuit pattern upon the bottom surface, and a through hole connecting the top circuit pattern with the bottom circuit pattern. Subsequently, a conductive circuit is formed upon the top circuit pattern and the bottom circuit pattern and inside the through hole, wherein the conductive circuit is restricted from being formed upon the top surface outside of the top isolation region and the bottom surface outside of the bottom isolation region.
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公开(公告)号:US20140014401A1
公开(公告)日:2014-01-16
申请号:US13547454
申请日:2012-07-12
Applicant: Pen-Yi LIAO , Ming-Chun WU , I-Lin TSENG , Tsung-Han WU , Jung-Chi LIN
Inventor: Pen-Yi LIAO , Ming-Chun WU , I-Lin TSENG , Tsung-Han WU , Jung-Chi LIN
CPC classification number: H05K3/184 , H05K3/107 , H05K2201/0376 , H05K2203/0713 , H05K2203/107
Abstract: A circuit device includes: a substrate having an insulative upper surface; a hydrophobic anti-plating layer of a hydrophobic material formed on the upper surface of the substrate and having at least one patterned through-hole for exposing a plating portion of the upper surface of the substrate; an active metal layer formed on the plating portion of the upper surface of the substrate and disposed in the patterned through-hole in the hydrophobic anti-plating layer; and an electroless deposited metal layer electroless deposited on the active metal layer.
Abstract translation: 电路装置包括:具有绝缘上表面的基板; 疏水性材料的疏水性防镀层形成在所述基板的上表面上并且具有至少一个图案化的通孔,用于暴露所述基板的上表面的镀层部分; 形成在所述基板的上表面的电镀部上并设置在所述疏水性防镀层的所述图案化通孔中的活性金属层; 以及沉积在活性金属层上的无电沉积金属层。
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