公开(公告)号：US06225570B1

公开(公告)日：2001-05-01

申请号：US09125260

申请日：1998-08-10

Applicant: Ichiro Ishiyama ,  Ichiro Nagare ,  Morikatsu Yamazaki ,  Yozo Ohara ,  Koji Higashi

Inventor： Ichiro Ishiyama ,  Ichiro Nagare ,  Morikatsu Yamazaki ,  Yozo Ohara ,  Koji Higashi

IPC: H05K116

CPC classification number: H05K1/162 ,  H05K1/095 ,  H05K1/165 ,  H05K1/167 ,  H05K3/0023 ,  H05K3/4623 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2203/0568 ,  H05K2203/171

Abstract: This invention provides a circuit board having an electric component which has an electric element smaller than a conventional element. A circuit pattern (5) which includes a pair of contact electrodes (3, 3) is formed on the surface of a board (1) made of an insulating material. A photoresist film (7) is formed on the surface of the board (1). At least one electric element forming hole (9) is formed in the photoresist film (7) by a lithography technology so as to expose at least part of the pair of the contact electrodes (3, 3). The electric element forming hole (9) is filled with an electric element forming paste material to form an electric element (13). A protective film (15) made of a synthetic resin is so formed as to cover the electric element forming hole (9).

Abstract translation: 本发明提供一种电路板，其具有比常规元件小的电气元件的电气部件。 在由绝缘材料制成的板（1）的表面上形成包括一对接触电极（3,3）的电路图案（5）。 在板（1）的表面上形成光致抗蚀剂膜（7）。 通过光刻技术在光致抗蚀剂膜（7）中形成至少一个电子元件形成孔（9），以暴露所述一对接触电极（3,3）的至少一部分。 电元件形成孔（9）填充有电子元件形成膏材以形成电元件（13）。 由合成树脂制成的保护膜（15）形成为覆盖电气元件形成孔（9）。

公开(公告)号：US6083340A

公开(公告)日：2000-07-04

申请号：US124692

申请日：1998-07-29

Applicant: Kazuo Nomura ,  Ichiro Ishiyama ,  Koji Higashi ,  Masaki Kato ,  Ichiro Nagare ,  Hiroyuki Kurokawa ,  Yozo Ohara

Inventor： Kazuo Nomura ,  Ichiro Ishiyama ,  Koji Higashi ,  Masaki Kato ,  Ichiro Nagare ,  Hiroyuki Kurokawa ,  Yozo Ohara

IPC: H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  B32B31/20

CPC classification number: H05K3/4069 ,  H05K3/429 ,  B32B2457/08 ,  H05K2201/0257 ,  H05K2201/035 ,  H05K2201/09454 ,  H05K2201/09981 ,  H05K2203/1476 ,  H05K3/4611 ,  Y10T156/1057 ,  Y10T29/49165

Abstract: A multi-layer circuit board capable of reducing an electrical resistance between circuit patterns positioned inside the circuit board and a through-hole connection conductor. A plurality of circuit patterns are superposed on each other with a plurality of insulating layers being alternately interposed therebetween in turn. A solution in which ultrafine metal particles of the independent dispersion type such as silver, gold, palladium or the like are contained in a colloid-like manner is applied so as to extend from one of lands through an inner surface of a through-hole to the other land. Then, the solution is calcined to form a metal particle film, The metal particle film is coated thereon with a conductive paste such as a resin/silver paste or the like, which is then calcined to form a conductive paste layer.

Abstract translation: 一种能够减小位于电路板内部的电路图案与通孔连接导体之间的电阻的多层电路板。 多个电路图案彼此重叠，并且依次交替插入多个绝缘层。 以胶体状包含诸如银，金，钯等独立分散型的超细金属颗粒的溶液，以从一个区域延伸穿过通孔的内表面到 另一块土地。 然后，将溶液煅烧以形成金属颗粒膜。用诸如树脂/银浆等的导电浆料涂覆金属颗粒膜，然后将其煅烧以形成导电浆料层。

公开(公告)号：US5920454A

公开(公告)日：1999-07-06

申请号：US798650

申请日：1997-02-11

Applicant: Kazuo Nomura ,  Nobutsugu Nakanuma ,  Ichiro Ishiyama ,  Koji Higashi ,  Masaki Kato ,  Ichiro Nagare ,  Hiroyuki Kurokawa ,  Yozo Ohara

Inventor： Kazuo Nomura ,  Nobutsugu Nakanuma ,  Ichiro Ishiyama ,  Koji Higashi ,  Masaki Kato ,  Ichiro Nagare ,  Hiroyuki Kurokawa ,  Yozo Ohara

IPC: H05K1/16 ,  H05K1/18 ,  H01K4/06 ,  H01K4/002

CPC classification number: H05K1/162 ,  H05K1/183 ,  H05K2201/0209 ,  H05K2201/09763

Abstract: A printed capacitor-mounted circuit board capable of increasing a capacity of each of printed capacitors formed on a printed board. A copper-clad laminate is arranged so as to act as an insulating substrate. The printed capacitors each include a first electrode made of a copper foil and arranged on a front surface of the copper-clad laminate. Then, a dielectric layer made of a dielectric paste is arranged on the first electrode and a second electrode made of a conductive paint is arranged on the dielectric layer.

Abstract translation: 一种印刷电容器安装的电路板，其能够增加形成在印刷电路板上的每个印刷电容器的容量。 覆铜层压板被布置成用作绝缘基板。 印刷电容器各自包括由铜箔制成的第一电极并布置在覆铜层压板的前表面上。 然后，在第一电极上布置由电介质浆料构成的电介质层，并且在电介质层上设置由导电涂料制成的第二电极。