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    Field emitter array with split gates and method for operating the same
    1.
    发明授权
    Field emitter array with split gates and method for operating the same 有权
    具有分裂门的场发射极阵列及其操作方法

    公开(公告)号：US07868850B2

    公开(公告)日：2011-01-11

    申请号：US11223130

    申请日：2005-09-12

    Applicant: Sungho Jin ,  Dong-Wook Kim ,  In Kyung Yoo

    Inventor： Sungho Jin ,  Dong-Wook Kim ,  In Kyung Yoo

    IPC: G09G3/28 ,  G09G5/00 ,  G06F3/02

    CPC classification number: H01J1/46 ,  G09G3/22 ,  H01J29/467 ,  H01J31/127

    Abstract: Field emitter arrays with split gates and methods for operating the same. A field emitter array may include one or more pairs of split gates, each connected to a corresponding voltage source, the split gates forming at least one gate hole for at least one emitter tip. Voltages, for example, AC voltages V1 and V2 may be applied to the split gates to perform one- or two-dimensional scanning or tilting depending on a ratio of V1 and V2.

    Abstract translation: 具有分裂门的场发射极阵列及其操作方法。 场发射器阵列可以包括一对或多对分离栅极，每对分离栅极连接到相应的电压源，分离栅极形成用于至少一个发射极尖端的至少一个栅极孔。 电压，例如，交流电压V1和V2可以施加到分离门，以根据V1和V2的比率执行一维或二维扫描或倾斜。

    Ferroelectric random access memory circuits and structures for preventing ferroelectric capacitors from memory failure
    3.
    发明授权
    Ferroelectric random access memory circuits and structures for preventing ferroelectric capacitors from memory failure 失效
    铁电随机存取存储器电路和用于防止铁电电容器存储器故障的结构

    公开(公告)号：US5822240A

    公开(公告)日：1998-10-13

    申请号：US549898

    申请日：1995-10-30

    Applicant: In-kyung Yoo

    Inventor： In-kyung Yoo

    IPC: H01G4/00 ,  G11C11/22

    CPC classification number: G11C11/22

    Abstract: A novel ferroelectric random access memory structure which comprises a capacitor consisting of upper and lower plane electrodes and a ferroelectric inserted therebetween, and a transistor comprising a means of inducing the capacitor to polarization and maintaining it, connected with at least one of the electrodes, wherein the electric potential of the upper electrode is equalized with that of the lower electrode, thereby preventing the polarization reversal caused by pyroelectric charges.

    Abstract translation: 一种新颖的铁电随机存取存储器结构，其包括由上平面电极和下平面电极组成的电容器和插入其间的铁电体，以及晶体管，其包括使电容器发生极化并保持电极的装置，与至少一个电极连接，其中 上电极的电位与下电极的电位相等，从而防止由热电荷引起的极化反转。

    Ferroelectric capacitor structure
    7.
    发明授权
    Ferroelectric capacitor structure 失效
    铁电电容器结构

    公开(公告)号：US5737180A

    公开(公告)日：1998-04-07

    申请号：US541772

    申请日：1995-10-10

    Applicant: In-kyung Yoo

    Inventor： In-kyung Yoo

    IPC: H01L27/04 ,  H01G4/06 ,  H01G4/005 ,  H01G4/008 ,  H01G4/228

    CPC classification number: H01G4/06

    Abstract: A ferroelectric capacitor structure variously having ceramic lower and upper electrodes, lower and upper insert layers, metal lower and upper electrodes, and a ferroelectric. The ceramic electrode(s) are variously connected with a writing terminal, and the metal electrodes are variously connected with a reading terminal. The use of a combination of metal and ceramic electrodes avoids both fatigue and leakage current.

    Abstract translation: 具有陶瓷下电极和上电极，下和上插入层，金属下电极和上电极以及铁电体的铁电电容器结构。 陶瓷电极与写入端子不同地连接，并且金属电极与读取端子不同地连接。 使用金属和陶瓷电极的组合避免了疲劳和漏电流。

    Article comprising metal oxide nanostructures
    8.
    发明授权
    Article comprising metal oxide nanostructures 失效
    文章包含金属氧化物纳米结构

    公开(公告)号：US08659217B2

    公开(公告)日：2014-02-25

    申请号：US11892737

    申请日：2007-08-27

    Applicant: Dong-Wook Kim ,  Sungho Jin ,  In-Kyung Yoo

    Inventor： Dong-Wook Kim ,  Sungho Jin ,  In-Kyung Yoo

    IPC: H01J1/62

    CPC classification number: H01J31/127 ,  H01J9/025 ,  H01J2201/30469 ,  H01J2329/0431 ,  H01J2329/0455 ,  Y10S977/742

    Abstract: This invention includes field emitters, in particular, electron field emitters with metal oxide nanoscale, aligned and sharped-tip emitter structures, the metal oxide emitter structures being a plurality of carbon nanostructures supported by and projecting from a substrate and including a metal oxide coating overlying the surfaces of the plurality of carbon nanostructures.

    Abstract translation: 本发明包括场致发射体，特别是具有金属氧化物纳米尺度，排列和锐尖发射极结构的电子场发射体，金属氧化物发射体结构是多个碳纳米结构，由碳纳米结构支撑并从衬底突出，并包括覆盖上面的金属氧化物涂层 多个碳纳米结构的表面。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20100038642A1

    公开(公告)日：2010-02-18

    申请号：US12405619

    申请日：2009-03-17

    Applicant: Myoung-Wook CHOI ,  Ki-Wan Ahn ,  Dong-Seong Koo ,  In-Kyung Yoo ,  Jae-Hyuk Jang ,  Hun Yoo ,  Hyun-Jae Ahn

    Inventor： Myoung-Wook CHOI ,  Ki-Wan Ahn ,  Dong-Seong Koo ,  In-Kyung Yoo ,  Jae-Hyuk Jang ,  Hun Yoo ,  Hyun-Jae Ahn

    IPC: H01L29/04 ,  H01L21/84

    CPC classification number: H01L27/12 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/136286 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3276

    Abstract: A thin film transistor (TFT) array panel includes a substrate, a first signal line disposed on the substrate, a first insulating layer disposed on the first signal line, a second signal line disposed on the first insulating layer, a second insulating layer disposed on the second signal line, the second insulating layer comprising an organic layer, a connection bridge disposed on the second insulating layer, the connection bridge connecting the first signal line with the second signal line, an overcoat disposed on the connection bridge, a first contact hole formed in the first and second insulating layers, the first contact hole exposing a portion of the first signal line, and a second contact hole formed in the second insulating layer, the second contact hole exposing a portion of the second signal line, wherein the connection bridge connects the first and second signal lines through the first and second contact holes.

    Abstract translation: 薄膜晶体管（TFT）阵列面板包括基板，设置在基板上的第一信号线，设置在第一信号线上的第一绝缘层，设置在第一绝缘层上的第二信号线，设置在第一绝缘层上的第二绝缘层 所述第二信号线，所述第二绝缘层包括有机层，连接桥设置在所述第二绝缘层上，所述连接桥连接所述第一信号线与所述第二信号线;外涂层，设置在所述连接桥上;第一接触孔 形成在第一和第二绝缘层中，第一接触孔暴露第一信号线的一部分，以及形成在第二绝缘层中的第二接触孔，第二接触孔暴露第二信号线的一部分，其中连接 桥接器通过第一和第二接触孔连接第一和第二信号线。

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