公开(公告)号：US5173766A

公开(公告)日：1992-12-22

申请号：US543989

申请日：1990-06-25

Applicant: Jon M. Long ,  Rachel S. Sidorovsky ,  Michael J. Steidl ,  Adrian Murphy ,  Bidyut Sen

Inventor： Jon M. Long ,  Rachel S. Sidorovsky ,  Michael J. Steidl ,  Adrian Murphy ,  Bidyut Sen

IPC: H01L21/50 ,  H01L21/54 ,  H01L21/58 ,  H01L23/00 ,  H01L23/10 ,  H01L23/24 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L24/85 ,  H01L21/50 ,  H01L21/54 ,  H01L23/10 ,  H01L23/24 ,  H01L23/3135 ,  H01L23/4985 ,  H01L23/564 ,  H01L24/29 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1517 ,  H01L2924/15747 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/19107 ,  Y10T29/49171

Abstract: A semiconductor device package and a method of making such a package is described. The package comprises a flexible packaging substrate having a patterned metal layer onto which a semiconductor die is attached and a patterned insulative layer attached to the metal layer. The insulative layer includes an annular epoxy-seal gap. A glob of silicone gel is deposited and cured on the die. A casting frame is connected to the metal layer of the flexible substrate on the same side as the die. A backside moisture-blocking layer of material is attached to an opposed side of the tape. The frame and the backside layer are attached to the metal layer of the flexible substrate using cross-linkable epoxy adhesives. These epoxy adhesives join through the epoxy-seal gap to define an epoxy-seal around the die. A thermoset type of molding compound is then poured into the casting frame to define a moisture resistant package body.

Abstract translation: 描述了半导体器件封装和制造这种封装的方法。 该封装包括具有图案化的金属层的柔性封装衬底，半导体管芯附着在该金属层上，以及连接到金属层的图案化绝缘层。 绝缘层包括环形环氧树脂密封间隙。 将硅胶球沉积并固化在模具上。 铸造框架与模具相同的一侧连接到柔性基板的金属层。 背面防潮层的材料附着在带的相对侧上。 框架和背面层使用可交联的环氧粘合剂附着到柔性基底的金属层上。 这些环氧树脂粘合剂通过环氧树脂密封间隙连接以在模具周围限定环氧树脂密封。 然后将热固性类型的模塑料倒入浇铸框架中以限定防潮包装体。

公开(公告)号：US5051813A

公开(公告)日：1991-09-24

申请号：US619108

申请日：1990-11-27

Applicant: Mark R. Schneider ,  Michael J. Steidl

Inventor： Mark R. Schneider ,  Michael J. Steidl

IPC: H01L21/56 ,  H01L23/28 ,  H01L23/50 ,  H05K3/30 ,  H05K13/00

CPC classification number: H05K3/303 ,  H01L2224/48247 ,  H01L2224/49171 ,  H05K2201/10424 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2201/10924 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613

Abstract: A plastic-packaged semiconductor device, method of making same, and mounting same to a printed circuit board is disclosed. The device has a body, and a plurality of leads extending from the body. Plastic webs are formed between adjacent leads for supporting the leads. Plastic bumps are formed at the ends of the webs, and align with recesses between conductors of wiring patterns on printed circuit boards, aiding in alignment of the device with the board.

Abstract translation: 公开了一种塑料封装半导体器件及其制造方法，并将其安装到印刷电路板上。 该装置具有主体和从主体延伸的多个引线。 在相邻引线之间形成塑料网以支撑引线。 塑料凸块形成在腹板的端部，并与印刷电路板上的布线图案的导体之间的凹槽对准，以帮助设备与板对准。

公开(公告)号：US5814892A

公开(公告)日：1998-09-29

申请号：US660490

申请日：1996-06-07

Applicant: Michael J. Steidl ,  Sanjay Dandia

Inventor： Michael J. Steidl ,  Sanjay Dandia

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/06 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06153 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/30107

Abstract: Improved manufacturability, yield, and reliability are achieved during wirebonding of a semiconductor die of reduced size by employing two rows of staggered conductive connectors, or bond pads, for wirebonding the die to a semiconductor package. An outer row of conductive connectors is positioned closer to the edge of the die than an inner row of conductive connectors and includes a greater number of connectors than the inner row. The die can be wirebonded to a package substrate having either a single row of bondfingers or multiple rows of bondfingers. In one embodiment, bond wires attaching the inner row of conductive pad connectors to the package substrate have a greater loop height than bond wires attaching the outer row of conductive pad connectors to the package substrate.

Abstract translation: 通过采用两排交错的导电连接器或接合焊盘将裸片引线接合到半导体封装，在减小尺寸的半导体管芯的引线接合期间实现了改进的可制造性，产量和可靠性。 导电连接器的外排定位成比内排的导电连接器更靠近模具的边缘，并且包括比内排更多数量的连接器。 模具可以引线键合到具有单排键合器或多行键合器的封装衬底。 在一个实施例中，将内排导电焊盘连接器连接到封装衬底的接合线具有比将外排导电焊盘连接器附接到封装衬底的接合线更大的环路高度。

公开(公告)号：US5796171A

公开(公告)日：1998-08-18

申请号：US712981

申请日：1996-09-16

Applicant: Aydin Koc ,  Michael J. Steidl ,  Sanjay Dandia

Inventor： Aydin Koc ,  Michael J. Steidl ,  Sanjay Dandia

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52 ,  H01L27/10 ,  H01L29/40

CPC classification number: H01L24/49 ,  H01L24/05 ,  H01L24/06 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06179 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/30107

Abstract: An integrated circuit having an outer ring of bonding pads which is positioned so as to be adjacent to and concentric with the perimeter of the integrated circuit. The outer ring of bonding pads extends for at least a first portion of the perimeter. An inner ring of bonding pads is positioned interior of, adjacent to, and concentric with the first ring of bonding pads. The inner ring of bonding pads extends for at least a second portion of the perimeter. The first portion is greater than the second portion, or in other words, the outer ring of bonding pads extends further around the integrated circuit than the inner ring of bonding pads. In addition, the outer ring of bonding pads has a greater number of bonding pads that the inner ring of bonding pads. Traces are electrically connected to the bonding pads of the inner and outer rings, such that each pad is electrically connected to a unique trace, meaning that each pad has a trace which is associated with just that pad and with no other pad. The pads of the inner and outer rings are staggered such that adjacent pads of the inner ring are separated by at least two of the traces which are connected to pads of the outer ring. By staggering the inner and outer rings of pads in this manner, pad density, ease of manufacture, and reliability are increased. By having the rings of pads progress around only a first and second portion of the perimeter of the integrated circuit, no space is taken up by bonding pads that are not required. For example, the outer ring of pads may extend all the way around the perimeter of the integrated circuit, and the inner ring of pads may only extend half way around the perimeter of the integrated circuit, because additional bonding pads are not required by the circuit.

Abstract translation: 一种具有接合焊盘的外环的集成电路，其定位成与集成电路的周边相邻并与其同心。 接合焊盘的外环延伸至周边的至少第一部分。 接合焊盘的内环位于与第一焊接环的内部，邻近并与其同心。 接合垫的内环延伸至周边的至少第二部分。 第一部分大于第二部分，或者换句话说，接合焊盘的外环围绕集成电路进一步延伸，而不是连接焊盘的内环。 此外，接合焊盘的外环具有更多数量的接合焊盘内圈的焊盘。 迹线电连接到内环和外环的接合焊盘，使得每个焊盘电连接到唯一的迹线，这意味着每个焊盘具有仅与该焊盘相关联并且没有其它焊盘的迹线。 内环和外环的焊盘交错，使得内环的相邻焊盘由连接到外环的焊盘的至少两个迹线分开。 通过以这种方式交错垫的内圈和外圈，垫密度，制造容易性和可靠性增加。 通过使垫片的环仅在集成电路的周边的第一和第二部分周围进行，没有空间被不需要的焊盘吸收。 例如，焊盘的外环可以围绕集成电路的周边延伸，并且焊盘的内环仅可以围绕集成电路的周边延伸一半，因为电路不需要额外的焊盘 。

公开(公告)号：US5104827A

公开(公告)日：1992-04-14

申请号：US721950

申请日：1991-06-27

Applicant: Mark R. Schneider ,  Michael J. Steidl

Inventor： Mark R. Schneider ,  Michael J. Steidl

IPC: H01L23/495 ,  H05K3/30

CPC classification number: H01L23/49558 ,  H05K3/303 ,  H01L2224/49171 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/181 ,  H05K2201/10424 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2201/10924 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49121 ,  Y10T29/49133

Abstract: A method of making a plastic-packaged semiconductor device, and mounting same to a printed circuit board is disclosed. The device has a body, and a plurality of leads extending from the body. Plastic webs are formed between adjacent leads for supporting the leads. Plastic bumps are formed at the ends of the webs, and align with recesses between conductors of wiring patterns on printed cirucit boards for aiding in alignment of the device with the board.

Abstract translation: 公开了制造塑料封装半导体器件并将其安装到印刷电路板的方法。 该装置具有主体和从主体延伸的多个引线。 在相邻引线之间形成塑料网以支撑引线。 塑料凸块形成在腹板的端部，并与打印的电缆板上的布线图案的导体之间的凹槽对准，以帮助设备与板对准。

公开(公告)号：US5023202A

公开(公告)日：1991-06-11

申请号：US380174

申请日：1989-07-14

Applicant: Jon M. Long ,  Michael J. Steidl

Inventor： Jon M. Long ,  Michael J. Steidl

IPC: H01L21/60 ,  H01L23/495 ,  H01L23/498 ,  H05K1/02

CPC classification number: H01L24/86 ,  H01L23/49572 ,  H01L23/4985 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L24/45 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0254 ,  H05K1/0271 ,  Y10T29/49121

Abstract: An improved method to assemble tape packaged integrated circuits includes spot welding a strip of TAB tape to a thin strip of copper called a strip carrier. The strip carrier provides mechanical rigidity to the tape during later processing, including die attachment and lead bonding and solder plating, as well as providing ESD protection since each tape lead is shorted to the strip carrier. The packaged die and the surrounding tape are excised from the strip carrier prior to final testing and the strip carrier is capable of being reused. The strip carriers are of a size and shape to be readily handled by existing integrated circuit handling equipment.

Abstract translation: 组装带封装集成电路的改进方法包括将一条TAB带（20）点焊到称为带状载体（10）的薄的铜带上。 带状载体在后续处理期间为带提供机械刚性，包括管芯附接和引线接合和焊接电镀，以及提供ESD保护，因为每个带引线与带状载体短接。 在最终测试之前，将包装的模具（40A，40B）和周围的带从带状载体切除，并且带状载体能够被再次使用。 带状载体具有容易由现有集成电路处理设备处理的尺寸和形状。