公开(公告)号：US09025124B2

公开(公告)日：2015-05-05

申请号：US13440499

申请日：2012-04-05

Applicant: Sung-Man Kim ,  Jun-Ho Song ,  Man-Hong Na ,  Young-Je Cho ,  Hoon Kang ,  Sung-Hoon Lim ,  Min-Chul Song ,  Soo-Jung Chae ,  Eu-Gene Lee

Inventor： Sung-Man Kim ,  Jun-Ho Song ,  Man-Hong Na ,  Young-Je Cho ,  Hoon Kang ,  Sung-Hoon Lim ,  Min-Chul Song ,  Soo-Jung Chae ,  Eu-Gene Lee

IPC: G02F1/1345 ,  H01L27/12 ,  G02F1/1362 ,  H01L29/417

CPC classification number: H01L27/1288 ,  G02F1/1345 ,  G02F1/13458 ,  G02F1/136227 ,  H01L27/124 ,  H01L29/41733

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.

Abstract translation: 显示基板包括数据线，栅极线和扇出线。 数据线设置在基板的显示区域中，并将数据信号传送到与像素电极电连接的开关元件。 栅极线设置在显示区域中，并将栅极信号传送到开关元件。 扇出线设置在围绕显示区域的基底基板的周边区域中，电连接到数据线和栅极线中的至少一个，并且包括通过触点彼此接触的多个导电层 孔。

公开(公告)号：US08526867B2

公开(公告)日：2013-09-03

申请号：US12926056

申请日：2010-10-22

Applicant: Hyun Ki Cho ,  Sung Dae Kim ,  Bong-Hwan Choi ,  Seok Heon Chae ,  Sung Hoon Lim

Inventor： Hyun Ki Cho ,  Sung Dae Kim ,  Bong-Hwan Choi ,  Seok Heon Chae ,  Sung Hoon Lim

IPC: G03G15/01

CPC classification number: G03G15/0131 ,  G03G15/5008 ,  G03G15/5058 ,  G03G2215/00059 ,  G03G2215/0161

Abstract: To restrict a period velocity change of a photoconductor that is an immediate cause of a color registration error, a gap change of a color registration error detection pattern caused by a linear velocity change of the photoconductor is acquired and a linear velocity change of the photoconductor is reduced based on a relationship between the gap change and a velocity of a motor, whereby a reduced color registration error is accomplished.

Abstract translation: 为了限制作为颜色配准误差的直接原因的光电导体的周期速度变化，获得由光电导体的线速度变化引起的颜色配准误差检测图案的间隙变化，并且光电导体的线速度变化为 基于间隙变化与马达的速度之间的关系而减小，由此实现了降低的颜色配准误差。

公开(公告)号：US20130105803A1

公开(公告)日：2013-05-02

申请号：US13616165

申请日：2012-09-14

Applicant: Min-Chul SONG ,  Man Hong NA ,  Young Je CHO ,  Sung Man KIM ,  Sung-Hoon LIM ,  Soo Jung CHAE ,  Eu Gene LEE

Inventor： Min-Chul SONG ,  Man Hong NA ,  Young Je CHO ,  Sung Man KIM ,  Sung-Hoon LIM ,  Soo Jung CHAE ,  Eu Gene LEE

IPC: H01L27/105

CPC classification number: H01L27/124

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract translation: 薄膜晶体管阵列面板包括：沿列方向延伸并传送数据电压的数据线; 连接到数据线并且在行方向上相邻的第一像素电极和第二像素电极; 连接到第一像素电极和数据线的第一薄膜晶体管，并且包括第一源极和第一漏极; 以及连接到第二像素电极和数据线的第二薄膜晶体管，并且包括第二源电极和第二漏电极。 第一像素电极位于数据线的右侧，第二像素电极位于数据线的左侧，第一源电极和第一漏电极的相对位置与第二源极的相对位置相同 和第二漏电极。

公开(公告)号：US20120194451A1

公开(公告)日：2012-08-02

申请号：US13239182

申请日：2011-09-21

Applicant: Sung-Hoon LIM ,  Jung-Hwan HWANG ,  Seung-Ho NAM ,  Sam-Jin HWANG ,  Jee-Hong MIN ,  Jae-Ho CHOI

Inventor： Sung-Hoon LIM ,  Jung-Hwan HWANG ,  Seung-Ho NAM ,  Sam-Jin HWANG ,  Jee-Hong MIN ,  Jae-Ho CHOI

IPC: G06F3/041 ,  H01L33/58

CPC classification number: G06F3/041 ,  G06F3/045 ,  G06F2203/04103

Abstract: The display panel includes an opposite substrate and an array substrate. The opposite substrate includes a first substrate including a first surface and a second surface opposite to the first surface, a first wire electrode formed on the first surface, a first transparent electrode formed on the first surface and partially overlapping with the first wire electrode, and a common electrode formed on the second surface. The first wire on the first surface is formed before the first transparent electrode on the first surface. The array substrate includes a second substrate including a third surface facing the second surface, and a pixel layer formed on the third surface and facing the common electrode.

Abstract translation: 显示面板包括相对的基板和阵列基板。 相对基板包括：第一基板，包括第一表面和与第一表面相对的第二表面;形成在第一表面上的第一线电极，形成在第一表面上并与第一线电极部分重叠的第一透明电极;以及 形成在第二表面上的公共电极。 第一表面上的第一线形成在第一表面上的第一透明电极之前。 阵列基板包括包括面向第二表面的第三表面的第二基板和形成在第三表面上并面向公共电极的像素层。

公开(公告)号：US07811641B2

公开(公告)日：2010-10-12

申请号：US12139154

申请日：2008-06-13

Applicant: Jin Jang ,  Kyu-Chang Park ,  Sung-Hoon Lim

Inventor： Jin Jang ,  Kyu-Chang Park ,  Sung-Hoon Lim

IPC: H05H1/24 ,  B05D5/12

CPC classification number: H01J1/304 ,  B82Y10/00 ,  H01J9/025 ,  H01J2201/30469 ,  H01J2329/00

Abstract: There are provided a method of forming carbon nano tubes, a field emission display device having the carbon nanotubes formed using the method, and a method of manufacturing the field emission display device. The method of forming carbon nanotubes includes forming a catalytic metal layer on a substrate, forming an insulation layer on the catalytic metal layer, and forming carbon nanotubes on the insulation layer.

Abstract translation: 提供了一种形成碳纳米管的方法，具有使用该方法形成的碳纳米管的场致发射显示装置以及该场致发射显示装置的制造方法。 形成碳纳米管的方法包括在基板上形成催化金属层，在催化金属层上形成绝缘层，在绝缘层上形成碳纳米管。

公开(公告)号：US20080248218A1

公开(公告)日：2008-10-09

申请号：US12139154

申请日：2008-06-13

Applicant: Jin Jang ,  Kyu-Chang Park ,  Sung-Hoon Lim

Inventor： Jin Jang ,  Kyu-Chang Park ,  Sung-Hoon Lim

IPC: C23C16/26 ,  H01J9/00 ,  B05D1/36

CPC classification number: H01J1/304 ,  B82Y10/00 ,  H01J9/025 ,  H01J2201/30469 ,  H01J2329/00

Abstract: There are provided a method of forming carbon nano tubes, a field emission display device having the carbon nanotubes formed using the method, and a method of manufacturing the field emission display device. The method of forming carbon nanotubes includes forming a catalytic metal layer on a substrate, forming an insulation layer on the catalytic metal layer, and forming carbon nanotubes on the insulation layer.

Abstract translation: 提供了一种形成碳纳米管的方法，具有使用该方法形成的碳纳米管的场致发射显示装置以及该场致发射显示装置的制造方法。 形成碳纳米管的方法包括在基板上形成催化金属层，在催化金属层上形成绝缘层，在绝缘层上形成碳纳米管。

公开(公告)号：US06648711B1

公开(公告)日：2003-11-18

申请号：US09592257

申请日：2000-06-12

Applicant: Jin Jang ,  Suk-jae Chung ,  Sung-hoon Lim ,  Jae-eun Yoo

Inventor： Jin Jang ,  Suk-jae Chung ,  Sung-hoon Lim ,  Jae-eun Yoo

IPC: H01J904

CPC classification number: B82Y10/00 ,  H01J1/304 ,  H01J9/025 ,  H01J31/127 ,  Y10S977/721 ,  Y10S977/723 ,  Y10S977/742 ,  Y10S977/843 ,  Y10S977/844 ,  Y10S977/888

Abstract: A field emitter having a high current density even at a low voltage using a carbon nanotube film, a method of manufacturing the same, and a field emission display device having the field emitter, are provided, The field emitter includes an insulating substrate. a thin film transistor formed on the insulating substrate, the thin film transistor having a semiconductor layer, a source electrode, a drain electrode and a gate electrode, and an electron emitting unit formed of a carbon nanotube film on the drain electrode of the thin film transistor The thin film transistor can be a coplanar-type transistor, a stagger-type transistor, or an inverse stagger-type transistor. The surface of a portion of the drain electrode, which contacts the carbon nanotube film, contains catalytic metal which is transition metal such as nickel or cobalt. Alternatively, the drain electrode itself can be formed of catalytic metal for carbon nanotube growth.

Abstract translation: 提供了即使在使用碳纳米管膜的低电压下也具有高电流密度的场致发射体，其制造方法以及具有该场致发射体的场致发射显示装置。场发射器包括绝缘基板。 形成在所述绝缘基板上的薄膜晶体管，所述薄膜晶体管具有半导体层，源极，漏极和栅电极，以及由所述薄膜的漏电极上的碳纳米管膜形成的电子发射单元 晶体管薄膜晶体管可以是共面型晶体管，交错型晶体管或反交错型晶体管。 与碳纳米管膜接触的漏电极的一部分的表面含有催化金属，其为镍或钴等过渡金属。 或者，漏电极本身可以由用于碳纳米管生长的催化金属形成。

公开(公告)号：US09190003B2

公开(公告)日：2015-11-17

申请号：US13618889

申请日：2012-09-14

Applicant: Sungman Kim ,  ManHong Na ,  Min-Chul Song ,  Junho Song ,  Eugene Lee ,  Sung-Hoon Lim ,  YoungJe Cho ,  Soojung Chae

Inventor： Sungman Kim ,  ManHong Na ,  Min-Chul Song ,  Junho Song ,  Eugene Lee ,  Sung-Hoon Lim ,  YoungJe Cho ,  Soojung Chae

IPC: G09G3/36 ,  G02F1/1362

CPC classification number: G09G3/3648 ,  G02F1/136227 ,  G02F1/136286 ,  G09G3/3674 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2320/0219 ,  G09G2320/0233

Abstract: A display apparatus includes a plurality of first gate lines extended in a first direction and disposed on a substrate on which a plurality of pixels is disposed, a plurality of second gate line extended in a second direction to cross the first gate lines, a plurality of data lines disposed substantially parallel to the first gate lines, and a first insulating layer disposed between the first gate lines and the second gate lines and provided with a plurality of via holes to expose a portion of a corresponding first gate line of the first gate lines. Each of the first gate lines makes contact with a corresponding second gate line of the second gate lines through a corresponding via hole of the via holes.

Abstract translation: 一种显示装置，包括：多个第一栅极线，沿第一方向延伸，并设置在其上设置有多个像素的基板上;多个第二栅极线，沿第二方向延伸以跨过第一栅极线;多个第二栅极线， 数据线布置成基本上平行于第一栅极线，以及第一绝缘层，设置在第一栅极线和第二栅极线之间，并且设置有多个通孔，以暴露第一栅极线的对应的第一栅极线的一部分 。 每个第一栅极线通过通孔的对应的通孔与第二栅极线的对应的第二栅极线接触。

公开(公告)号：US09136283B2

公开(公告)日：2015-09-15

申请号：US13616165

申请日：2012-09-14

Applicant: Min-Chul Song ,  Man Hong Na ,  Young Je Cho ,  Sung Man Kim ,  Sung-Hoon Lim ,  Soo Jung Chae ,  Eu Gene Lee

Inventor： Min-Chul Song ,  Man Hong Na ,  Young Je Cho ,  Sung Man Kim ,  Sung-Hoon Lim ,  Soo Jung Chae ,  Eu Gene Lee

IPC: H01L29/04 ,  H01L27/12

CPC classification number: H01L27/124

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract translation: 薄膜晶体管阵列面板包括：沿列方向延伸并传送数据电压的数据线; 连接到数据线并且在行方向上相邻的第一像素电极和第二像素电极; 连接到第一像素电极和数据线的第一薄膜晶体管，并且包括第一源极和第一漏极; 以及连接到第二像素电极和数据线的第二薄膜晶体管，并且包括第二源电极和第二漏电极。 第一像素电极位于数据线的右侧，第二像素电极位于数据线的左侧，第一源电极和第一漏电极的相对位置与第二源极的相对位置相同 和第二漏电极。

公开(公告)号：US20130043473A1

公开(公告)日：2013-02-21

申请号：US13440499

申请日：2012-04-05

Applicant: Sung-Man Kim ,  Jun-Ho Song ,  Man-Hong Na ,  Young-Je Cho ,  Hoon Kang ,  Sung-Hoon Lim ,  Min-Chul Song ,  Soo-Jung Chae ,  Eu-Gene Lee

Inventor： Sung-Man Kim ,  Jun-Ho Song ,  Man-Hong Na ,  Young-Je Cho ,  Hoon Kang ,  Sung-Hoon Lim ,  Min-Chul Song ,  Soo-Jung Chae ,  Eu-Gene Lee

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L27/1288 ,  G02F1/1345 ,  G02F1/13458 ,  G02F1/136227 ,  H01L27/124 ,  H01L29/41733

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.

Abstract translation: 显示基板包括数据线，栅极线和扇出线。 数据线设置在基板的显示区域中，并将数据信号传送到与像素电极电连接的开关元件。 栅极线设置在显示区域中，并将栅极信号传送到开关元件。 扇出线设置在围绕显示区域的基底基板的周边区域中，电连接到数据线和栅极线中的至少一个，并且包括通过触点彼此接触的多个导电层 孔。