Memory module having star-type topology and method of fabricating the same
    1.
    发明授权
    Memory module having star-type topology and method of fabricating the same 有权
    具有星型拓扑的存储器模块及其制造方法

    公开(公告)号:US07821803B2

    公开(公告)日:2010-10-26

    申请号:US12221728

    申请日:2008-08-06

    CPC classification number: G11C5/04 G11C5/025 Y10T29/49002

    Abstract: A memory module having a start-type topology and a method of fabricating the same are provided. The memory module includes a substrate. Memory devices are mounted on the substrate in at least two rows and at least two columns. A star-type topology is disposed to be electrically connected to the memory devices. One or more pairs of adjacent ones of the memory devices have a point-symmetric structure.

    Abstract translation: 提供具有起动型拓扑的存储器模块及其制造方法。 存储器模块包括衬底。 存储器件以至少两行和至少两列安装在衬底上。 星型拓扑被布置成电连接到存储器件。 一对或多对相邻的存储器件具有点对称结构。

    SUBSTRATE HAVING A STRUCTURE FOR SUPPRESSING NOISE GENERATED IN A POWER PLANE AND/OR A GROUND PLANE, AND AN ELECTRONIC SYSTEM INCLUDING THE SAME
    4.
    发明申请
    SUBSTRATE HAVING A STRUCTURE FOR SUPPRESSING NOISE GENERATED IN A POWER PLANE AND/OR A GROUND PLANE, AND AN ELECTRONIC SYSTEM INCLUDING THE SAME 有权
    具有用于抑制在电力平面和/或地面平面中产生的噪声的结构的基板以及包括其的电子系统

    公开(公告)号:US20090184778A1

    公开(公告)日:2009-07-23

    申请号:US12354488

    申请日:2009-01-15

    Abstract: A substrate includes a power plane and a ground plane that are placed apart from and are substantially parallel to each other, and at least one signal line that is placed between the power plane and the ground plane. The ground plane includes a first conductive layer having a first conductivity. The power plane includes a second conductive layer having the first conductivity, and the power plane or the ground plane includes a third conductive layer having a second conductivity lower than the first conductivity. The third conductive layer faces the at least one signal line across a dielectric substance.

    Abstract translation: 基板包括放置在彼此之间并且基本上彼此平行的电源平面和接地平面以及放置在电源平面和接地平面之间的至少一条信号线。 接地平面包括具有第一导电性的第一导电层。 功率平面包括具有第一导电性的第二导电层,并且功率平面或接地平面包括具有比第一导电率低的第二导电性的第三导电层。 第三导电层面对穿过电介质物质的至少一条信号线。

    Method for determination of presence or absence of peptide compound PYY3-36
    5.
    发明授权
    Method for determination of presence or absence of peptide compound PYY3-36 有权
    测定肽化合物PYY3-36存在或不存在的方法

    公开(公告)号:US07993929B2

    公开(公告)日:2011-08-09

    申请号:US12463889

    申请日:2009-05-11

    CPC classification number: C07K14/575 G01N33/6818 Y02P20/55 Y10S436/815

    Abstract: The present invention provides a method for determining in a pharmaceutical test formulation the presence or absence of a peptide compound PYY3-36 represented by the following amino acid sequence: H-Ile-Lys-Pro-Glu-Ala-Pro-Gly-Glu-Asp-Ala-Ser-Pro-Glu-Glu-Leu-Asn-Arg-Tyr-Tyr-Ala-Ser-Leu-Arg-His-Tyr-Leu-Asn-Leu-Val-Thr-Arg-Gln-Arg-Tyr-X (SEQ ID NO: 1), wherein X is OH or a carboxy acid-protecting group, the method comprising (1) preparing a solution by mixing the pharmaceutical test formulation with cucurbit[7]uril in a solvent; and (2) thermally analyzing the solution prepared in Step (1).

    Abstract translation: 本发明提供了用于在药物试验制剂中测定由以下氨基酸序列表示的肽化合物PYY3-36的存在或不存在的方法:H-Ile-Lys-Pro-Glu-Ala-Pro-Gly-Glu- Asp-Ala-Ser-Pro-Glu-Glu-Leu-Asn-Arg-Tyr-Tyr-Ala-Ser-Leu-Arg-His-Tyr-Leu-Asn-Leu-Val-Thr-Arg-Gln-Arg- Tyr-X(SEQ ID NO:1),其中X是OH或羧酸保护基团,该方法包括(1)通过将药物测试制剂与葫芦巴[7]尿素混合在溶剂中来制备溶液; 和(2)热分析步骤(1)中制备的溶液。

    METHOD FOR DETERMINATION OF PRESENCE OR ABSENCE OF PEPTIDE COMPOUND PYY3-36
    6.
    发明申请
    METHOD FOR DETERMINATION OF PRESENCE OR ABSENCE OF PEPTIDE COMPOUND PYY3-36 有权
    确定肽类化合物PYY3-36的存在或不存在的方法

    公开(公告)号:US20100009453A1

    公开(公告)日:2010-01-14

    申请号:US12463889

    申请日:2009-05-11

    CPC classification number: C07K14/575 G01N33/6818 Y02P20/55 Y10S436/815

    Abstract: The present invention provides a method for determining in a pharmaceutical test formulation the presence or absence of a peptide compound PYY3-36 represented by the following amino acid sequence: H-Ile-Lys-Pro-Glu-Ala-Pro-Gly-Glu-Asp-Ala-Ser-Pro-Glu-Glu-Leu-Asn-Arg-Tyr-Tyr-Ala-Ser-Leu-Arg-His-Tyr-Leu-Asn-Leu-Val-Thr-Arg-Gln-Arg-Tyr-X (SEQ ID NO: 1), wherein X is OH or a carboxy acid-protecting group, the method comprising (1) preparing a solution by mixing the pharmaceutical test formulation with cucurbit[7]uril in a solvent; and (2) thermally analyzing the solution prepared in Step (1).

    Abstract translation: 本发明提供了用于在药物试验制剂中测定由以下氨基酸序列表示的肽化合物PYY3-36的存在或不存在的方法:H-Ile-Lys-Pro-Glu-Ala-Pro-Gly-Glu- Asp-Ala-Ser-Pro-Glu-Glu-Leu-Asn-Arg-Tyr-Tyr-Ala-Ser-Leu-Arg-His-Tyr-Leu-Asn-Leu-Val-Thr-Arg-Gln-Arg- Tyr-X(SEQ ID NO:1),其中X是OH或羧酸保护基团,该方法包括(1)通过将药物测试制剂与葫芦巴[7]尿素混合在溶剂中来制备溶液; 和(2)热分析步骤(1)中制备的溶液。

    Method of joining electronic package capable of prevention for brittle fracture
    8.
    发明申请
    Method of joining electronic package capable of prevention for brittle fracture 审中-公开
    连接能够预防脆性断裂的电子封装的方法

    公开(公告)号:US20080237314A1

    公开(公告)日:2008-10-02

    申请号:US11907528

    申请日:2007-10-12

    Abstract: Disclosed is a method of joining electronic package parts, comprising the steps of: reflowing lead-free solders containing alloy elements on top of each of the electronic package parts having a surface treated with copper or nickel; and mounting the surface treated electronic parts on the lead-free solders then reflowing the lead-free solders to generate intermetallic compound between the lead-free solders and the surface treated portion of each of the electronic parts.Alternatively, the method of joining the electronic package parts according to the present invention comprises the steps of: forming a plating layer made of alloy elements on top of each of the electronic parts having a surface treated with copper or nickel and reflowing lead-free solders; and mounting the surface treated electronic parts on the lead-free solders then reflowing the lead-free solders to allow the alloy elements contained in the plating layer to be diffused into the lead-free solders and generate intermetallic compound between the lead-free solders and the surface treated portion of each of the electronic parts.The present invention can prevent brittle fracture of the electronic package parts by deriving alteration of the intermetallic compounds generated from existing lead-free solders when the electronic package parts of electronic devices are solder joined together, thereby ensuring reliability of the electronic devices.

    Abstract translation: 公开了一种连接电子封装部件的方法,包括以下步骤:在具有用铜或镍处理的表面的每个电子封装部件的顶部上回流含有合金元素的无铅焊料; 并将表面处理的电子部件安装在无铅焊料上,然后回流无铅焊料,以在无铅焊料和每个电子部件的表面处理部分之间产生金属间化合物。 或者,根据本发明的接合电子封装部件的方法包括以下步骤:在具有用铜或镍处理的表面的每个电子部件的顶部上形成由合金元件制成的镀层和回流无铅焊料 ; 并将表面处理的电子部件安装在无铅焊料上,然后回流无铅焊料,使包含在镀层中的合金元素扩散到无铅焊料中,并在无铅焊料与无铅焊料之间产生金属间化合物 每个电子部件的表面处理部分。 本发明可以通过在电子器件的电子封装部件焊接在一起时导致由现有的无铅焊料产生的金属间化合物的变化来防止电子封装部件的脆性断裂,从而确保电子器件的可靠性。

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