公开(公告)号：US09051178B2

公开(公告)日：2015-06-09

申请号：US13617920

申请日：2012-09-14

Applicant: Yong-chul Cho ,  Yong-tak Lee ,  Jang-woo You ,  Byung-hoon Na ,  Yong-hwa Park ,  Chang-young Park ,  Hee-ju Chio ,  Gun-wu Ju

Inventor： Yong-chul Cho ,  Yong-tak Lee ,  Jang-woo You ,  Byung-hoon Na ,  Yong-hwa Park ,  Chang-young Park ,  Hee-ju Chio ,  Gun-wu Ju

IPC: G02F1/017 ,  B82Y20/00 ,  H01L31/0352

CPC classification number: B82Y20/00 ,  G02F1/017 ,  G02F2203/12 ,  H01L31/035236

Abstract: A transmissive light modulator including a first reflection layer; a first active layer, arranged on the first reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; a second reflection layer arranged on the first active layer; a second active layer, arranged on the second reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; and a third reflection layer arranged on the second active layer, wherein the first reflection layer and the third reflection layer are each doped with a first type dopant, and the second reflection layer is doped with a second type dopant, which is electrically opposite to the first type dopant.

Abstract translation: 一种透射光调制器，包括第一反射层; 第一有源层，布置在所述第一反射层上并且包括多个量子阱层和多个势垒层; 布置在第一有源层上的第二反射层; 第二有源层，布置在所述第二反射层上并且包括多个量子阱层和多个势垒层; 以及布置在所述第二有源层上的第三反射层，其中所述第一反射层和所述第三反射层各自掺杂有第一类型掺杂剂，并且所述第二反射层掺杂有与所述第二反射层电气相反的第二类型掺杂剂 第一种掺杂剂。

公开(公告)号：US20130175500A1

公开(公告)日：2013-07-11

申请号：US13617920

申请日：2012-09-14

Applicant: Yong-chul CHO ,  Yong-tak LEE ,  Jang-woo YOU ,  Byung-hoon NA ,  Yong-hwa PARK ,  Chang-young PARK ,  Hee-ju CHIO ,  Gun-wu JU

Inventor： Yong-chul CHO ,  Yong-tak LEE ,  Jang-woo YOU ,  Byung-hoon NA ,  Yong-hwa PARK ,  Chang-young PARK ,  Hee-ju CHIO ,  Gun-wu JU

IPC: H01L31/0352 ,  H01L31/18

CPC classification number: B82Y20/00 ,  G02F1/017 ,  G02F2203/12 ,  H01L31/035236

Abstract: A transmissive light modulator including a first reflection layer; a first active layer, arranged on the first reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; a second reflection layer arranged on the first active layer; a second active layer, arranged on the second reflection layer and including a plurality of quantum well layers and a plurality of barrier layers; and a third reflection layer arranged on the second active layer, wherein the first reflection layer and the third reflection layer are each doped with a first type dopant, and the second reflection layer is doped with a second type dopant, which is electrically opposite to the first type dopant.

Abstract translation: 一种透射光调制器，包括第一反射层; 第一有源层，布置在所述第一反射层上并且包括多个量子阱层和多个势垒层; 布置在第一有源层上的第二反射层; 第二有源层，布置在所述第二反射层上并且包括多个量子阱层和多个势垒层; 以及布置在所述第二有源层上的第三反射层，其中所述第一反射层和所述第三反射层各自掺杂有第一类型掺杂剂，并且所述第二反射层掺杂有与所述第二反射层电气相反的第二类型掺杂剂 第一种掺杂剂。

公开(公告)号：US20120120466A1

公开(公告)日：2012-05-17

申请号：US13384735

申请日：2010-06-04

Applicant: Yong Tak Lee ,  Feng Xiao ,  Kamal Alameh

Inventor： Yong Tak Lee ,  Feng Xiao ,  Kamal Alameh

IPC: G03H1/08

CPC classification number: H01S3/086 ,  G03H1/08 ,  H01S3/0675 ,  H01S3/06754 ,  H01S3/06766 ,  H01S3/08009 ,  H01S3/08059 ,  H01S3/2383

Abstract: A wavelength-tunable laser system includes an optical fiber collimator array having at least two ports, an optical amplifier connected to one port of an optical fiber, an optical coupler for coupling light incident from the optical amplifier and transmitting the coupled light to another port, a diffraction grating plate for guiding each wavelength component of light incident from the optical fiber collimator array in a different direction, and an Opto-Very Large Scale Integration (Opto-VLSI) processor.

Abstract translation: 波长可调激光系统包括具有至少两个端口的光纤准直器阵列，连接到光纤的一个端口的光学放大器，用于耦合从光学放大器入射的光并将耦合的光传输到另一个端口的光耦合器， 衍射光栅板，用于引导从光纤准直器阵列入射的光在不同方向上的每个波长分量，以及光电超大规模集成（Opto-VLSI）处理器。

公开(公告)号：US08021903B2

公开(公告)日：2011-09-20

申请号：US12085585

申请日：2006-11-28

Applicant: Ki-Soo Chang ,  Yong-Tak Lee ,  Alameh Kamal

Inventor： Ki-Soo Chang ,  Yong-Tak Lee ,  Alameh Kamal

IPC: H01L21/00

CPC classification number: G02B3/0012

Abstract: Provided are a method of fabricating a microlens using selective etching of a compound semi-conductor and a method of fabricating a photoelectric device having the microlens. The formation of the microlens includes patterning a compound semiconductor layer and removing a lateral surface of the compound semiconductor layer to form a roughly hemispheric lens. The lateral surface of the compound semiconductor layer is removed by a digital alloy method. In particular, the lateral surface of the compound semiconductor layer is removed by a wet etching process.

Abstract translation: 提供了使用化合物半导体的选择性蚀刻来制造微透镜的方法以及制造具有微透镜的光电装置的方法。 微透镜的形成包括图案化化合物半导体层并去除化合物半导体层的侧表面以形成大致半球形的透镜。 通过数字合金法去除化合物半导体层的侧表面。 特别地，化学半导体层的侧表面通过湿法蚀刻工艺除去。

公开(公告)号：US20110181936A1

公开(公告)日：2011-07-28

申请号：US12938064

申请日：2010-11-02

Applicant: Yong-Chul CHO ,  Yong-Tak LEE ,  Yong-Hwa PARK ,  Byung-Hoon NA ,  Kwang-Mo PARK ,  Chang-Soo PARK

Inventor： Yong-Chul CHO ,  Yong-Tak LEE ,  Yong-Hwa PARK ,  Byung-Hoon NA ,  Kwang-Mo PARK ,  Chang-Soo PARK

IPC: G02F1/017 ,  B82Y20/00

CPC classification number: G02F1/017 ,  B82Y20/00 ,  G02F1/218 ,  G02F2001/0155 ,  G02F2201/307 ,  G02F2203/12

Abstract: Optical modulator having wide bandwidth based on Fabry-Perot resonant reflection is disclosed. The optical modulator includes: a bottom Distributed Bragg Reflector (DBR) layer; a top DBR layer including at least one layer, and a modified layer; and an active layer disposed between bottom and top DBR layers, wherein the at least one layer includes at least one pair of a first refractive index layer having a first refractive index and a second refractive index layer having a second refractive index, the modified layer includes at least one pair of a third refractive index layer having a third refractive index and a fourth refractive index layer having a fourth refractive index, the third and the fourth refractive indexes being different, and at least one of the third and the fourth refractive index layers has a second optical thickness that is not λ/4 or that is not an odd multiple thereof.

Abstract translation: 公开了基于法布里 - 珀罗共振反射的具有宽带宽的光调制器。 光调制器包括：底部分布布拉格反射器（DBR）层; 包括至少一个层的顶部DBR层和修饰层; 以及设置在底部和顶部DBR层之间的有源层，其中所述至少一层包括至少一对具有第一折射率的第一折射率层和具有第二折射率的第二折射率层，所述改性层包括 至少一对具有第三折射率的第三折射率层和具有第四折射率的第四折射率层，第三和第四折射率不同，并且第三和第四折射率层中的至少一个 具有不是λ/ 4的第二光学厚度，或者不是其奇数倍。

公开(公告)号：US20110092007A1

公开(公告)日：2011-04-21

申请号：US12999148

申请日：2009-12-22

Applicant: Yong Tak Lee ,  Young Min Song

Inventor： Yong Tak Lee ,  Young Min Song

IPC: H01L33/44 ,  G03F7/00

CPC classification number: G02B5/1857 ,  G03F7/0005

Abstract: A method of fabricating an antireflective grating pattern and a method of fabricating an optical device integrated with an antireflective grating pattern are provided. The method of fabricating the antireflective grating pattern includes forming a photoresist (PR) pattern on a substrate using a hologram lithography process, forming a PR lens pattern having a predetermined radius of curvature by reflowing the PR pattern, and etching the entire surface of the substrate including the PR lens pattern to form a wedge-type or parabola-type antireflective subwavelength grating (SWG) pattern having a pointed tip on a top surface of the substrate. In this method, a fabrication process is simplified, the reflection of light caused by a difference in refractive index between the air and a semiconductor material can be minimized, and the antireflective grating pattern can be easily applied to optical devices.

Abstract translation: 提供了制造抗反射光栅图案的方法和制造与抗反射光栅图案集成的光学器件的方法。 制造抗反射光栅图案的方法包括使用全息光刻工艺在基板上形成光致抗蚀剂（PR）图案，通过回流PR图案形成具有预定曲率半径的PR​​透镜图案，并蚀刻基板的整个表面 包括PR透镜图案以形成在基板的顶表面上具有尖尖的楔形或抛物线型抗反射亚波长光栅（SWG）图案。 在该方法中，简化了制造工艺，可以将由空气和半导体材料之间的折射率差引起的光的反射最小化，并且可以将抗反射光栅图案容易地应用于光学器件。

公开(公告)号：US06649955B2

公开(公告)日：2003-11-18

申请号：US10199455

申请日：2002-07-19

Applicant: Yong-Tak Lee

Inventor： Yong-Tak Lee

IPC: H01L31119

CPC classification number: H01L27/11502 ,  H01L21/76802 ,  H01L21/76895 ,  H01L27/11507 ,  H01L28/55

Abstract: A ferroelectric memory device and a method of fabricating the same are disclosed. Four interlayer dielectric layers are stacked on cell array and peripheral circuit regions on a semiconductor substrate. A gate contact pad and a source/drain contact pad are connected to a gate electrode and a source/drain of the peripheral circuit transistor through the first interlayer dielectric layer. A gate contact plug and a source/drain contact plug are respectively connected to the gate contact pad and the source/drain contact pad through the second interlayer dielectric layer. First via holes expose the gate contact plug and the source contact plug through the third interlayer dielectric layer. A first interconnection extends between the third and fourth interlayer dielectric layers, covering the sidewalls of the first via holes and connected to at least one of the gate contact plug and the source/drain contact plug.

Abstract translation: 公开了铁电存储器件及其制造方法。 在半导体衬底上的单元阵列和外围电路区域上层叠四层电介质层。 栅极接触焊盘和源极/漏极接触焊盘通过第一层间介质层连接到外围电路晶体管的栅极电极和源极/漏极。 栅极接触插塞和源极/漏极接触插塞分别通过第二层间介质层连接到栅极接触焊盘和源极/漏极接触焊盘。 第一通孔通过第三层间介电层露出栅极接触插塞和源极接触插塞。 第一互连在第三和第四层间电介质层之间延伸，覆盖第一通孔的侧壁并连接到栅极接触插塞和源极/漏极接触插塞中的至少一个。

公开(公告)号：US5242839A

公开(公告)日：1993-09-07

申请号：US981865

申请日：1992-11-25

Applicant: Kwang-Ryong Oh ,  Yong-Tak Lee

Inventor： Kwang-Ryong Oh ,  Yong-Tak Lee

IPC: H01L27/14 ,  H01L21/8252 ,  H01L27/095 ,  H01L27/144 ,  H01L31/10 ,  H01L31/105 ,  H01L31/18

CPC classification number: H01L21/8252 ,  H01L27/1443 ,  H01L31/105 ,  H01L31/1844 ,  Y02E10/544 ,  Y02P70/521

Abstract: The present invention relates to an integrated photoelectric receiving device in which a PIN-type photodetector and a junction field effect transistor (FET) are integrated in a single chip. The photoelectric receiving device comprises a photodetector having a n-channel layer, an etching stopper layer and an absorption layer formed on a semi-dielectric substrate, the n-channel layer, the etching stopper layer and the absorption layer being formed in a reverse mesa shape and the substrate being etched by a predetermined depth; a transistor having a n-channel layer, an etching stopper layer and a p-type InP layer sequentially formed on the non-etched portion of the semi-insulator substrate, the p-type InP layer having an absorption layer formed thereon in a reversedmesa shape. Also, the invention contemplates a method of manufacturing the device.

Abstract translation: 本发明涉及集成在单芯片中的PIN型光检测器和结型场效应晶体管（FET）的集成光电接收装置。 光电接收装置包括具有n沟道层，蚀刻停止层和形成在半电介质基板上的吸收层的光电探测器，n沟道层，蚀刻阻挡层和吸收层形成在反向台面 形状并且衬底被蚀刻预定深度; 在半绝缘体基板的未蚀刻部分上依次形成具有n沟道层，蚀刻停止层和p型InP层的晶体管，其中在反介质中形成有吸收层的p型InP层 形状。 此外，本发明考虑了一种制造该装置的方法。

公开(公告)号：US08760754B2

公开(公告)日：2014-06-24

申请号：US13384735

申请日：2010-06-04

Applicant: Yong Tak Lee ,  Feng Xiao ,  Kamal Alameh

Inventor： Yong Tak Lee ,  Feng Xiao ,  Kamal Alameh

IPC: H01S3/086 ,  H01S3/067 ,  H01S3/08

CPC classification number: H01S3/086 ,  G03H1/08 ,  H01S3/0675 ,  H01S3/06754 ,  H01S3/06766 ,  H01S3/08009 ,  H01S3/08059 ,  H01S3/2383

Abstract: A wavelength-tunable laser system includes an optical fiber collimator array having at least two ports, an optical amplifier connected to one port of an optical fiber, an optical coupler for coupling light incident from the optical amplifier and transmitting the coupled light to another port, a diffraction grating plate for guiding each wavelength component of light incident from the optical fiber collimator array in a different direction, and an Opto-Very Large Scale Integration (Opto-VLSI) processor.

Abstract translation: 波长可调激光系统包括具有至少两个端口的光纤准直器阵列，连接到光纤的一个端口的光学放大器，用于耦合从光学放大器入射的光并将耦合的光传输到另一个端口的光耦合器， 衍射光栅板，用于引导从光纤准直器阵列入射的光在不同方向上的每个波长分量，以及光电超大规模集成（Opto-VLSI）处理器。

公开(公告)号：US08647903B2

公开(公告)日：2014-02-11

申请号：US12999148

申请日：2009-12-22

Applicant: Yong Tak Lee ,  Young Min Song

Inventor： Yong Tak Lee ,  Young Min Song

IPC: H01L21/00

CPC classification number: G02B5/1857 ,  G03F7/0005

Abstract: A method of fabricating an antireflective grating pattern and a method of fabricating an optical device integrated with an antireflective grating pattern are provided. The method of fabricating the antireflective grating pattern includes forming a photoresist (PR) pattern on a substrate using a hologram lithography process, forming a PR lens pattern having a predetermined radius of curvature by reflowing the PR pattern, and etching the entire surface of the substrate including the PR lens pattern to form a wedge-type or parabola-type antireflective subwavelength grating (SWG) pattern having a pointed tip on a top surface of the substrate. In this method, a fabrication process is simplified, the reflection of light caused by a difference in refractive index between the air and a semiconductor material can be minimized, and the antireflective grating pattern can be easily applied to optical devices.

Abstract translation: 提供了制造抗反射光栅图案的方法和制造与抗反射光栅图案集成的光学器件的方法。 制造抗反射光栅图案的方法包括使用全息光刻工艺在基板上形成光致抗蚀剂（PR）图案，通过回流PR图案形成具有预定曲率半径的PR​​透镜图案，并蚀刻基板的整个表面 包括PR透镜图案以形成在基板的顶表面上具有尖尖的楔形或抛物线型抗反射亚波长光栅（SWG）图案。 在该方法中，简化了制造工艺，可以将由空气和半导体材料之间的折射率差引起的光的反射最小化，并且可以将抗反射光栅图案容易地应用于光学器件。