公开(公告)号：US20110204367A1

公开(公告)日：2011-08-25

申请号：US12672135

申请日：2008-08-06

Applicant: Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

IPC: H01L33/02 ,  H01L29/786 ,  H01L21/336

CPC classification number: H01L51/057 ,  H01L27/3274 ,  H01L27/3276 ,  H01L51/0096 ,  Y02E10/549 ,  Y02P70/521

Abstract: A semiconductor device having a semiconductor elements formed with higher density is provided. Furthermore an image display device using the semiconductor device is also provided.A semiconductor device comprising a resin film that has a through hole that penetrates from one surface to the other surface thereof, a source electrode disposed along the inner wall of the through hole, a drain electrode disposed along the inner wall of the through hole, a gate electrode disposed on the other surface of the resin film opposing the through hole, an insulating layer disposed on the gate electrode at the bottom of the through hole and an organic semiconductor disposed in the through hole so as to contact the source electrode and the drain electrode, wherein the organic semiconductor makes contact with at least a part of the insulating layer at the bottom of the through hole so that a channel is formed in the organic semiconductor in the vicinity of the insulating layer that is in contact therewith.

Abstract translation: 提供了具有以更高密度形成的半导体元件的半导体器件。 此外，还提供了使用该半导体器件的图像显示装置。 一种半导体器件，包括具有从一个表面到另一个表面穿透的通孔的树脂膜，沿着通孔的内壁设置的源电极，沿该通孔的内壁设置的漏电极， 设置在与通孔相对的树脂膜的另一个表面上的栅电极，设置在通孔底部的栅电极上的绝缘层和布置在通孔中的有机半导体，以便与源电极和漏极 电极，其中有机半导体与通孔底部的绝缘层的至少一部分接触，使得在与其接触的绝缘层附近的有机半导体中形成沟道。

公开(公告)号：US20110204366A1

公开(公告)日：2011-08-25

申请号：US12672127

申请日：2008-08-06

Applicant: Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

IPC: H01L33/02 ,  H01L29/786 ,  H01L21/336

CPC classification number: H01L27/3274 ,  H01L27/283 ,  H01L27/3248 ,  H01L27/3276 ,  H01L51/0005 ,  H01L51/0558 ,  H01L2227/323

Abstract: A semiconductor device having a semiconductor elements formed with higher density is provided. Furthermore an image display device using the semiconductor device is also provided.A semiconductor device comprising a resin film that has a through hole that penetrates from one surface to the other surface thereof, an organic semiconductor disposed inside the through hole, an insulating film on one end of the organic semiconductor, a gate electrode on the insulating film, a source electrode connected electrically to the other end of the organic semiconductor and a drain electrode connected electrically to the other end of the organic semiconductor.

Abstract translation: 提供了具有以更高密度形成的半导体元件的半导体器件。 此外，还提供了使用该半导体器件的图像显示装置。 一种半导体器件，包括具有从一个表面到另一个表面穿透的通孔的树脂膜，设置在所述通孔内的有机半导体，在所述有机半导体的一端上的绝缘膜，所述绝缘膜上的栅电极 与该有机半导体的另一端电连接的源电极和与该有机半导体的另一端电连接的漏电极。

公开(公告)号：US07959280B2

公开(公告)日：2011-06-14

申请号：US11937946

申请日：2007-11-09

Applicant: Shoji Koike ,  Yoshihisa Yamashita ,  Kohei Watanabe ,  Hayato Ida

Inventor： Shoji Koike ,  Yoshihisa Yamashita ,  Kohei Watanabe ,  Hayato Ida

IPC: G01D11/00

CPC classification number: B41J11/0015 ,  C09D11/38

Abstract: The present invention provides an ink-jet recording method for forming an image by applying an ink to a recording medium, wherein the ink used contains at least water, a pigment, a dispersing agent for dispersing the pigment and an acid form of an anionic surfactant. The ink has a surface tension higher than the critical surface tension of the recording medium. The ink is applied to the recording medium, and the surface tension of the ink is reduced to a surface tension below the critical surface tension of the recording medium after contacting the recording medium.

Abstract translation: 本发明提供了一种用于通过向记录介质施加油墨来形成图像的喷墨记录方法，其中使用的油墨至少含有水，颜料，用于分散颜料的分散剂和酸形式的阴离子表面活性剂 。 油墨的表面张力高于记录介质的临界表面张力。 油墨被施加到记录介质上，并且在接触记录介质之后，油墨的表面张力降低到低于记录介质的临界表面张力的表面张力。

公开(公告)号：US07911064B2

公开(公告)日：2011-03-22

申请号：US11908087

申请日：2006-02-28

Applicant: Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

Inventor： Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

IPC: H01L21/44 ,  H01L23/52 ,  H01L23/40 ,  H01L23/48 ,  H01L21/00

CPC classification number: H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83886 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.

Abstract translation: 本发明的安装体包括：层叠半导体芯片10（10a，10b）的多层半导体芯片20， 以及安装基板13，其上安装有多层半导体芯片20。 在该安装体中，多层半导体芯片20中的各半导体芯片10（10a，10b）在与安装基板13相对的芯片面21（21a，21b）上具有多个元件电极12（12a，12b） 在安装基板13上分别形成有与多个元件电极（12a，12b）对应的电极端子14，并且安装基板的电极端子14和元件电极（12a，12b）被连接 通过焊料颗粒的组装形成的焊锡凸块彼此电连接。 利用这种结构，可以容易地制造安装有堆叠的包装的安装体。

公开(公告)号：US20100276691A1

公开(公告)日：2010-11-04

申请号：US12746440

申请日：2009-07-22

Applicant: Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano ,  Yoshihisa Yamashita ,  Shingo Komatsu

Inventor： Takashi Ichiryu ,  Seiichi Nakatani ,  Koichi Hirano ,  Yoshihisa Yamashita ,  Shingo Komatsu

IPC: H01L29/786 ,  H01L21/336 ,  H01L21/77

CPC classification number: H01L29/78603 ,  H01L24/19 ,  H01L24/82 ,  H01L27/1218 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78681 ,  H01L29/7869 ,  H01L51/0024 ,  H01L51/003 ,  H01L51/0097 ,  H01L51/0541 ,  H01L51/0545 ,  H01L2221/68377 ,  H01L2224/04105 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00

Abstract: A method for fabricating a flexible semiconductor device includes: preparing a layered film 80 including a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40 which are sequentially formed; etching the first metal layer 10 to form a gate electrode 12g; compression bonding a resin layer 50 to a surface of the layered film 80 provided with the gate electrode 12g to allow the gate electrode 12g to be embedded in the resin layer 50; and etching the second metal layer 40 to form a source electrode 42s and a drain electrode 42d, wherein the inorganic insulating layer 20 on the gate electrode 12g functions as a gate insulating film 22, and the semiconductor layer 30 between the source electrode 42s and drain electrode 42d on the inorganic insulating layer 20 functions as a channel 32.

Abstract translation: 一种制造柔性半导体器件的方法包括：制备包括依次形成的第一金属层10，无机绝缘层20，半导体层30和第二金属层40的层状膜80; 蚀刻第一金属层10以形成栅电极12g; 将树脂层50压接到设置有栅电极12g的层叠膜80的表面，以使栅电极12g嵌入树脂层50中; 并且蚀刻第二金属层40以形成源电极42s和漏电极42d，其中栅电极12g上的无机绝缘层20用作栅极绝缘膜22，并且源电极42s和漏极之间的半导体层30 无机绝缘层20上的电极42d用作通道32。

公开(公告)号：US20100224986A1

公开(公告)日：2010-09-09

申请号：US12728615

申请日：2010-03-22

Applicant: Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

Inventor： Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

IPC: H01L23/498

CPC classification number: H01L24/81 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/171 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/82001 ,  H01L2224/83385 ,  H01L2224/83886 ,  H01L2224/83888 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00015 ,  H01L2224/81805 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.

Abstract translation: 本发明的安装体（100）包括：具有形成元件电极（12）的表面（10a）和与表面（10a）相对的后表面（10b）的半导体元件（10）。 以及安装板（30），在其上形成有各自具有电极端子（32）的布线图案（35）。 半导体元件（10）的后表面（10b）与安装板（30）接触，并且半导体元件（10）的元件电极（12）与电极端子（32）电连接 通过由组装成桥形的焊料颗粒形成的焊料连接器（20）在安装板（30）上形成的布线图案（35）。 利用这种结构，半导体元件的元件电极和安装板的电极端子之间的细间距连接成为可能。

公开(公告)号：US07731346B2

公开(公告)日：2010-06-08

申请号：US11798508

申请日：2007-05-15

Applicant: Shoji Koike ,  Yoshihisa Yamashita ,  Kohei Watanabe ,  Hayato Ida

Inventor： Shoji Koike ,  Yoshihisa Yamashita ,  Kohei Watanabe ,  Hayato Ida

IPC: C09D11/00

CPC classification number: B41J2/2107

Abstract: The present invention provides an ink-jet recording method for forming an image by applying an ink to a recording medium. The ink contains at least water, a colorant and a surfactant. The content of the surfactant is higher than or equal to the critical micelle concentration of the surfactant, and the ink used has a surface tension lower than or equal to the critical surface tension of the recording medium. The ink is applied on the recording medium, and the surface tension of the ink is increased to a surface tension higher than the critical surface tension of the recording medium after the ink contacts the recording medium.

Abstract translation: 本发明提供了一种通过将油墨施加到记录介质上来形成图像的喷墨记录方法。 油墨至少含有水，着色剂和表面活性剂。 表面活性剂的含量高于或等于表面活性剂的临界胶束浓度，并且使用的油墨具有低于或等于记录介质的临界表面张力的表面张力。 油墨被施加在记录介质上，并且油墨的表面张力在油墨接触记录介质之后增加到高于记录介质的临界表面张力的表面张力。

公开(公告)号：US20100033523A1

公开(公告)日：2010-02-11

申请号：US12534969

申请日：2009-08-04

Applicant: Katsuhiko Suzuki ,  Katsuhiro Shirota ,  Hirofumi Ichinose ,  Masashi Tsujimura ,  Hiromitsu Kishi ,  Takashi Saito ,  Sayoko Nagashima ,  Fumihiko Mukae ,  Yoshihisa Yamashita

Inventor： Katsuhiko Suzuki ,  Katsuhiro Shirota ,  Hirofumi Ichinose ,  Masashi Tsujimura ,  Hiromitsu Kishi ,  Takashi Saito ,  Sayoko Nagashima ,  Fumihiko Mukae ,  Yoshihisa Yamashita

IPC: B41J29/38 ,  C09D11/10

CPC classification number: B41J29/00 ,  B41J2/1752 ,  C09D11/322 ,  C09D11/54

Abstract: Provided are an ink jet ink set, an ink jet recording method, and an ink jet recording apparatus each of which can reduce the graininess of an image to be recorded and improve the water fastness of the image even in a recording medium such as plain paper. The ink jet ink set has a first ink and a second ink independently, and is used so that the first and second inks overlap each other at least partly upon application of the inks to a recording medium. The first ink contains at least a pigment and a silicone oil. The second ink contains at least a pigment and a graft polymer that includes at least a nonionic unit represented by the general formula (I) and a unit having a polysiloxane structure.

Abstract translation: 提供了一种喷墨油墨组，喷墨记录方法和喷墨记录装置，其中每一种都可以降低要记录的图像的颗粒度，并且即使在诸如普通纸的记录介质中也能提高图像的耐水性 。 喷墨油墨组独立地具有第一油墨和第二油墨，并且被使用以使得第一和第二油墨至少部分地在将油墨施加到记录介质上时彼此重叠。 第一油墨至少含有颜料和硅油。 第二油墨含有至少含有由通式（I）表示的非离子单元和具有聚硅氧烷结构的单元的至少一种颜料和接枝聚合物。

公开(公告)号：US07611040B2

公开(公告)日：2009-11-03

申请号：US11579505

申请日：2006-04-25

Applicant: Takashi Kitae ,  Seiichi Nakatani ,  Toshiyuki Kojima ,  Shingo Komatsu ,  Yoshihisa Yamashita

Inventor： Takashi Kitae ,  Seiichi Nakatani ,  Toshiyuki Kojima ,  Shingo Komatsu ,  Yoshihisa Yamashita

IPC: B23K31/02 ,  H01L21/44

CPC classification number: H05K3/3484 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/323 ,  H05K3/3436 ,  H05K2201/09745 ,  H05K2201/10977 ,  H05K2203/0108 ,  H05K2203/0113 ,  H05K2203/043 ,  H05K2203/0465 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/29099

Abstract: A method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device is provided. A flat plate having a plurality of projections or recesses thereon is prepared; the flat plate is aligned to oppose an electronic component and a resin composition including a solder powder is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals, so as to form solder bumps on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps. Thus, the solder bumps having pits corresponding to the projections or having protrusions corresponding to the recesses are formed.

Abstract translation: 提供一种用于形成用于实现高密度安装的焊料凸块的方法和用于安装半导体器件的高可靠性方法。 制备其上具有多个突起或凹部的平板; 将平板对准电子部件，将包含焊料粉末的树脂组合物供给到平板和电子部件之间的间隙; 对树脂组合物进行退火，通过使熔融的焊料粉末在端子上自组装，将包含在树脂组合物中的焊料粉末熔化成使焊料粉末生长直至平板表面的水平，从而形成焊料凸块 在终端上 并且在冷却并固化焊料凸块之后去除平板。 因此，形成具有对应于突起或具有与凹部对应的突起的凹坑的焊料凸块。

公开(公告)号：US20090230546A1

公开(公告)日：2009-09-17

申请号：US11908087

申请日：2006-02-28

Applicant: Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

Inventor： Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

IPC: H01L23/498 ,  B23K31/02

CPC classification number: H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83886 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.

Abstract translation: 本发明的安装体包括：层叠半导体芯片10（10a，10b）的多层半导体芯片20， 以及安装基板13，其上安装有多层半导体芯片20。 在该安装体中，多层半导体芯片20中的各半导体芯片10（10a，10b）在与安装基板13相对的芯片面21（21a，21b）上具有多个元件电极12（12a，12b） 在安装基板13上分别形成有与多个元件电极（12a，12b）对应的电极端子14，并且安装基板的电极端子14和元件电极（12a，12b）被连接 通过焊料颗粒的组装形成的焊锡凸块彼此电连接。 利用这种结构，可以容易地制造安装有堆叠的包装的安装体。