公开(公告)号：US20130005088A1

公开(公告)日：2013-01-03

申请号：US13531983

申请日：2012-06-25

Applicant: Sang-Uk HAN ,  Jeong-Kyu Ha ,  Youngshin Kwon ,  Seung Hwan Kim ,  KwanJai Lee

Inventor： Sang-Uk HAN ,  Jeong-Kyu Ha ,  Youngshin Kwon ,  Seung Hwan Kim ,  KwanJai Lee

IPC: H01L21/78

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/13 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/81001 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided are methods of forming semiconductor modules. The method includes forming a high polymer material layer having an adhesive property on a support substrate, adhering a semiconductor chip to the support substrate using the high polymer material layer, bonding the semiconductor chip adhered to the support substrate to a flexible panel, and removing the support substrate.

Abstract translation: 提供了形成半导体模块的方法。 该方法包括在支撑基板上形成具有粘合性的高分子材料层，使用高分子材料层将半导体芯片粘附到支撑基板上，将附着在支撑基板上的半导体芯片接合到柔性面板上， 支撑基板。

公开(公告)号：US20160111299A1

公开(公告)日：2016-04-21

申请号：US14967490

申请日：2015-12-14

Applicant: Jeong-Kyu HA ,  Youngshin KWON ,  KwanJai LEE ,  Jae-Min JUNG ,  KyongSoon CHO ,  Sang-Uk HAN

Inventor： Jeong-Kyu HA ,  Youngshin KWON ,  KwanJai LEE ,  Jae-Min JUNG ,  KyongSoon CHO ,  Sang-Uk HAN

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L21/486 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/78 ,  H01L23/145 ,  H01L23/49524 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/50 ,  H01L2924/12042 ,  H05K1/114 ,  H05K1/115 ,  H05K1/189 ,  H05K3/0052 ,  H05K3/107 ,  H05K3/42 ,  H05K2203/1545 ,  Y10T156/1052 ,  H01L2924/00

Abstract: A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.

Abstract translation: 提供包括绝缘图案的胶带包装; 绝缘图案中的通孔中的通孔接触; 从所述通孔接触延伸到所述绝缘图案的切割表面的第一互连图案; 以及连接到绝缘图案下方的通孔接点的第二互连图案。 第二互连图案平行于第一互连图案并与绝缘图案的切割表面间隔开。

公开(公告)号：US08940621B2

公开(公告)日：2015-01-27

申请号：US13531983

申请日：2012-06-25

Applicant: Sang-Uk Han ,  Jeong-Kyu Ha ,  Youngshin Kwon ,  Seung Hwan Kim ,  KwanJai Lee

Inventor： Sang-Uk Han ,  Jeong-Kyu Ha ,  Youngshin Kwon ,  Seung Hwan Kim ,  KwanJai Lee

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/00 ,  H01L21/683

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/13 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/81001 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided are methods of forming semiconductor modules. The method includes forming a high polymer material layer having an adhesive property on a support substrate, adhering a semiconductor chip to the support substrate using the high polymer material layer, bonding the semiconductor chip adhered to the support substrate to a flexible panel, and removing the support substrate.

Abstract translation: 提供了形成半导体模块的方法。 该方法包括在支撑基板上形成具有粘合性的高分子材料层，使用高分子材料层将半导体芯片粘合到支撑基板上，将附着在支撑基板上的半导体芯片接合到柔性面板上， 支撑基板。