Heat dissipation substrate for multi-chip package

    公开(公告)号:US11177188B1

    公开(公告)日:2021-11-16

    申请号:US17019333

    申请日:2020-09-13

    Abstract: A chip packaging structure includes a heat dissipation substrate, a pre-molded chipset, an interconnection and a second encapsulant. The pre-molded chipset is located on the heat dissipation substrate. The interconnection is located in the packaging structure and electrically connects the heat dissipation substrate and the pre-molded chipset. The second encapsulant covers part of the heat dissipation substrate, part or all of the interconnection, and part or all of the pre-molded chipset. The pre-molded chipset includes a thermally conductive substrate, at least two chips, a patterned circuit, and a first encapsulant. The patterned circuit is located in the pre-molded chipset. At least two chips are electrically connected by the patterned circuit. The first encapsulant covers at least two chips and part or all of the patterned circuit. A manufacturing method of a chip packaging structure is also provided.

    PACKAGE STRUCTURE FOR POWER DEVICE

    公开(公告)号:US20210050320A1

    公开(公告)日:2021-02-18

    申请号:US16671197

    申请日:2019-11-01

    Abstract: A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, at least one conductive clip, and a heat dissipation baseplate. The heat dissipation insulating substrate has a first surface and a second surface opposite thereto, and the power devices form a bridge circuit topology and are disposed on the first surface, wherein active regions of at least one of the power devices are flip-chip bonded to the first surface. The conductive clip is configured to electrically connect at least one of the power devices to the first surface, and the heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate.

    SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20250096086A1

    公开(公告)日:2025-03-20

    申请号:US18495688

    申请日:2023-10-26

    Abstract: A semiconductor module includes a substrate, at least one chip, at least one signal assembly, a first molding compound, and a second molding compound. The chip is disposed on the substrate and electrically connected to the substrate. The signal assembly is disposed on the substrate in a normal direction of the substrate and electrically connected to the substrate. The first molding compound is disposed on the substrate. The first molding compound at least covers the chip and has at least one opening, and the opening exposes the signal assembly. The second molding compound is disposed on the substrate and fills the opening. The second molding compound is located between the signal assembly and the first molding compound, and covers the signal assembly. At least one contact interface is formed between the second molding compound and the first molding compound.

    POWER DEVICE PACKAGE STRUCTURE
    4.
    发明申请

    公开(公告)号:US20190393111A1

    公开(公告)日:2019-12-26

    申请号:US16124199

    申请日:2018-09-07

    Abstract: A power device package structure including a first substrate, a second substrate, at least one power device, and a package is provided. A heat conductivity of the first substrate is greater than 200 Wm−1K−1. The power device is disposed on the first substrate, and the second substrate is disposed under the first substrate. A heat capacity of the second substrate is greater than that of the first substrate. The package encapsulates the first substrate, the second substrate, and the power device.

    ENERGY CONVERSION MODULE AND ENERGY CONVERSION DEVICE

    公开(公告)号:US20240282652A1

    公开(公告)日:2024-08-22

    申请号:US18191883

    申请日:2023-03-29

    Abstract: Disclosed are an energy conversion module and an energy conversion device. The energy conversion module includes an encapsulation structure and an integrated module packaged therein, the integrated module includes a trace, a power chip, a transistor control element and an energy storage device. The trace includes at least two electrodes, one is exposed from a first surface of the encapsulation structure, and the other is exposed from a second surface of the encapsulation structure. The first surface is opposite to the second surface. The power chip is respectively connected to the two electrodes of the trace. The transistor control element controls the power chip to perform energy conversion through the trace. The energy storage device supplies energy to the transistor control element through the trace.

    HEAT DISSIPATION STRUCTURE AND POWER MODULE
    6.
    发明公开

    公开(公告)号:US20240274494A1

    公开(公告)日:2024-08-15

    申请号:US18179363

    申请日:2023-03-07

    CPC classification number: H01L23/3677 H01L23/3735

    Abstract: A heat dissipation structure includes a substrate and an annular groove. The substrate has an upper surface and a lower surface opposite to each other. The annular groove is configured on the upper surface of the substrate to divide the substrate into a configuration area and a periphery area. The annular groove is located between the configuration area and the periphery area. A depth of the annular groove is less than or equal to half of a thickness of the substrate.

    Intelligent power module packaging structure

    公开(公告)号:US11810835B2

    公开(公告)日:2023-11-07

    申请号:US17082030

    申请日:2020-10-28

    CPC classification number: H01L23/3735 H01L23/3157 H01L23/49861 H01L23/5386

    Abstract: An intelligent power module packaging structure includes an insulated heat dissipation substrate, a plurality of power devices, a control chip, a lead frame, and an encapsulant. The insulated heat dissipation substrate has a first surface and a second surface opposite to the first surface. The power devices are disposed on the first surface. The control chip is disposed on the first surface. The control chip provides a gate driver function for driving the power devices and a pulse width modulation function. The lead frame is bonded onto the first surface. The power devices are electrically connected to the control chip and the lead frame. The encapsulant at least encapsulates the power devices, the control chip, and a portion of the lead frame, and the second surface is entirely or partially exposed outside the encapsulant.

    Power device package structure
    8.
    发明授权

    公开(公告)号:US11232992B2

    公开(公告)日:2022-01-25

    申请号:US16124199

    申请日:2018-09-07

    Abstract: A power device package structure including a first substrate, a second substrate, at least one power device, and a package is provided. A heat conductivity of the first substrate is greater than 200 Wm−1K−1. The power device is disposed on the first substrate, and the second substrate is disposed under the first substrate. A heat capacity of the second substrate is greater than that of the first substrate. The package encapsulates the first substrate, the second substrate, and the power device.

    Package structure for power device

    公开(公告)号:US11183439B2

    公开(公告)日:2021-11-23

    申请号:US16669487

    申请日:2019-10-30

    Abstract: A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, a heat dissipation baseplate, and a thermal interface layer. The heat dissipation insulating substrate has a first surface and a second surface which are opposite to each other, and the power devices are coupled to the first surface of the heat dissipation insulating substrate. The heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate, wherein at least one of a surface of the heat dissipation baseplate and the second surface of the heat dissipation insulating substrate has at least one plateau, and the plateau is at least disposed within a projected area of the plurality of power devices. The thermal interface layer is disposed between the second surface of the heat dissipation insulating substrate and the surface of the heat dissipation baseplate.

    PACKAGE STRUCTURE FOR POWER DEVICE
    10.
    发明申请

    公开(公告)号:US20210074604A1

    公开(公告)日:2021-03-11

    申请号:US16669487

    申请日:2019-10-30

    Abstract: A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, a heat dissipation baseplate, and a thermal interface layer. The heat dissipation insulating substrate has a first surface and a second surface which are opposite to each other, and the power devices are coupled to the first surface of the heat dissipation insulating substrate. The heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate, wherein at least one of a surface of the heat dissipation baseplate and the second surface of the heat dissipation insulating substrate has at least one plateau, and the plateau is at least disposed within a projected area of the plurality of power devices. The thermal interface layer is disposed between the second surface of the heat dissipation insulating substrate and the surface of the heat dissipation baseplate.

Patent Agency Ranking