公开(公告)号：US20200098082A1

公开(公告)日：2020-03-26

申请号：US16138708

申请日：2018-09-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Anthony GUTIERREZ ,  Muhammad Amber HASSAAN ,  Sooraj PUTHOOR

IPC: G06T1/60 ,  G06T1/20 ,  G06F12/02 ,  G06F9/30

Abstract: A processing unit includes one or more processor cores and a set of registers to store configuration information for the processing unit. The processing unit also includes a coprocessor configured to receive a request to modify a memory allocation for a kernel concurrently with the kernel executing on the at least one processor core. The coprocessor is configured to modify the memory allocation by modifying the configuration information stored in the set of registers. In some cases, initial configuration information is provided to the set of registers by a different processing unit. The initial configuration information is stored in the set of registers prior to the coprocessor modifying the configuration information.

公开(公告)号：US20250028554A1

公开(公告)日：2025-01-23

申请号：US18909132

申请日：2024-10-08

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Anthony GUTIERREZ ,  Sooraj PUTHOOR

IPC: G06F9/48 ,  G06F9/38 ,  G06F9/54

Abstract: A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

公开(公告)号：US20230185607A1

公开(公告)日：2023-06-15

申请号：US17993490

申请日：2022-11-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Anthony GUTIERREZ ,  Sooraj PUTHOOR

IPC: G06F9/48 ,  G06F9/54 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/542 ,  G06F9/545 ,  G06F9/546 ,  G06F9/3877

Abstract: A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

公开(公告)号：US20200167191A1

公开(公告)日：2020-05-28

申请号：US16200503

申请日：2018-11-26

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Tsung Tai YEH ,  Bradford BECKMANN ,  Sooraj PUTHOOR ,  Matthew David SINCLAIR

IPC: G06F9/48

Abstract: A processing system includes a task queue, a laxity-aware task scheduler coupled to the task queue, and a workgroup dispatcher coupled to the laxity-aware task scheduler. Based on a laxity evaluation of laxity values associated with a plurality of tasks stored in the task queue, the workgroup dispatcher schedules the plurality of tasks. The laxity evaluation includes determining a priority of each task of the plurality of tasks. The laxity value is determined using laxity information, where the laxity information includes an arrival time, a task duration, a task deadline, and a number of workgroups.

公开(公告)号：US20200089528A1

公开(公告)日：2020-03-19

申请号：US16134695

申请日：2018-09-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Anthony GUTIERREZ ,  Sooraj PUTHOOR

IPC: G06F9/48 ,  G06F9/54 ,  G06F9/38

Abstract: A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

公开(公告)号：US20230229494A1

公开(公告)日：2023-07-20

申请号：US18095704

申请日：2023-01-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Muhammad Amber HASSAAN ,  Anirudh Mohan KAUSHIK ,  Sooraj PUTHOOR ,  Gokul Subramanian RAVI ,  Bradford BECKMANN ,  Ashwin AJI

IPC: G06F9/48 ,  G06F9/52 ,  G06F16/901

CPC classification number: G06F9/4881 ,  G06F9/52 ,  G06F16/9024 ,  G06F2209/486

Abstract: A processor includes a task scheduling unit and a compute unit coupled to the task scheduling unit. The task scheduling unit performs a task dependency assessment of a task dependency graph and task data requirements that correspond to each task of the plurality of tasks. Based on the task dependency assessment, the task scheduling unit schedules a first task of the plurality of tasks and a second proxy object of a plurality of proxy objects specified by the task data requirements such that a memory transfer of the second proxy object of the plurality of proxy objects occurs while the first task is being executed.

公开(公告)号：US20210294646A1

公开(公告)日：2021-09-23

申请号：US16824601

申请日：2020-03-19

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Muhammad Amber HASSAAN ,  Anirudh Mohan KAUSHIK ,  Sooraj PUTHOOR ,  Gokul Subramanian RAVI ,  Bradford BECKMANN ,  Ashwin AJI

IPC: G06F9/48 ,  G06F16/901 ,  G06F9/52

Abstract: A processor includes a task scheduling unit and a compute unit coupled to the task scheduling unit. The task scheduling unit performs a task dependency assessment of a task dependency graph and task data requirements that correspond to each task of the plurality of tasks. Based on the task dependency assessment, the task scheduling unit schedules a first task of the plurality of tasks and a second proxy object of a plurality of proxy objects specified by the task data requirements such that a memory transfer of the second proxy object of the plurality of proxy objects occurs while the first task is being executed.

公开(公告)号：US20210216368A1

公开(公告)日：2021-07-15

申请号：US17215171

申请日：2021-03-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Anthony GUTIERREZ ,  Sooraj PUTHOOR

IPC: G06F9/48 ,  G06F9/54 ,  G06F9/38

Abstract: A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.