公开(公告)号：US20170022051A1

公开(公告)日：2017-01-26

申请号：US15092234

申请日：2016-04-06

Applicant: ANALOG DEVICES, INC.

Inventor： Xiaojie Xue ,  Michael J. Zylinski ,  Thomas M. Goida ,  Kathleen O. O'Donnell

IPC: B81B7/00 ,  B81C1/00 ,  H01L23/24 ,  H01L25/065

CPC classification number: B81B7/0048 ,  B81B2207/115 ,  B81C1/00365 ,  B81C2201/0147 ,  B81C2203/0136 ,  H01L23/057 ,  H01L23/562 ,  H01L25/0657 ,  H01L2225/06575

Abstract: An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.

Abstract translation: 公开了一种集成器件封装。 封装可以包括诸如第一集成器件管芯的载体和堆叠在第一集成器件管芯上的第二集成器件管芯。 封装可以包括缓冲层，该缓冲层涂覆第一集成器件管芯的外表面的至少一部分，并且设置在第二集成器件管芯和第一集成器件管芯之间。 缓冲层可以包括用于减少第一集成器件管芯和第二集成器件裸片之间的应力传输的图案。

公开(公告)号：US10287161B2

公开(公告)日：2019-05-14

申请号：US15092234

申请日：2016-04-06

Applicant: ANALOG DEVICES, INC.

Inventor： Xiaojie Xue ,  Michael J. Zylinski ,  Thomas M. Goida ,  Kathleen O. O'Donnell

IPC: B81B7/00 ,  H01L25/065 ,  B81C1/00 ,  H01L23/057 ,  H01L23/00

Abstract: An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.