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公开(公告)号:US20220414222A1
公开(公告)日:2022-12-29
申请号:US17356776
申请日:2021-06-24
Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
Inventor: Gia Phan , Ashish Jain , Randall Brown
Abstract: A trusted processor saves and restores context and data stored at a frame buffer of a GPU concurrent with initialization of a CPU of the processing system. In response to detecting that the GPU is powering down, the trusted processor accesses the context of the GPU and data stored at a frame buffer of the GPU via a high-speed bus. The trusted processor stores the context and data at a system memory, which maintains the context and data while the GPU is powered down. In response to detecting that the GPU is powering up again, the trusted processor restores the context and data to the GPU, which can be performed concurrently with initialization of the CPU.
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公开(公告)号:US20220335003A1
公开(公告)日:2022-10-20
申请号:US17234191
申请日:2021-04-19
Applicant: Advanced Micro Devices, Inc.
Inventor: Shijie Che , Wentao Xu , Randall Brown , Vaibhav Amarayya Hiremath , Manuchehr Taghi-Loo
IPC: G06F15/177 , G06F9/50 , G06F9/38 , H04L29/12
Abstract: A computing system may implement a method for creating a first subdomain by configuring one of a first plurality of slave nodes as a first subdomain master node and configuring one or more other slave nodes of the first plurality of slave nodes as first subdomain slave nodes to the first subdomain master node.
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公开(公告)号:US20240319781A1
公开(公告)日:2024-09-26
申请号:US18189993
申请日:2023-03-24
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: Gia Tung Phan , Randall Brown , Ashish Jain
IPC: G06F1/3234 , G06F1/3228 , G06F1/3287
CPC classification number: G06F1/3275 , G06F1/3228 , G06F1/3287
Abstract: An apparatus and method for efficient power management of multiple integrated circuits. In various implementations, a computing system includes an integrated circuit with a security processor. The security processor determines the integrated circuit transitions to an active state from a sleep state that is not intended to maintain configuration information to return to the active state without restarting an operating system. In the sleep state, multiple components of the integrated circuit have a power supply reference level turned off, which provides low power consumption for the integrated circuit. The security processor performs the bootup operation using information stored in persistent on-chip memory. By not using information stored in off-chip memory, the security processor reduces the latency of the transition. The persistent on-chip memory utilizes synchronous random-access memory that receives a standby power supply reference level that continually supplies a voltage magnitude by not being turned off.
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公开(公告)号:US12105666B2
公开(公告)日:2024-10-01
申请号:US17234191
申请日:2021-04-19
Applicant: Advanced Micro Devices, Inc. , ATI TECHNOLOGIES ULC
Inventor: Shijie Che , Wentao Xu , Randall Brown , Vaibhav Amarayya Hiremath , Manuchehr Taghi-Loo
IPC: G06F9/38 , G06F15/177 , H04L41/0893
CPC classification number: G06F15/177 , G06F9/3877 , H04L41/0893
Abstract: A computing system may implement a method for creating a first subdomain by configuring one of a first plurality of slave nodes as a first subdomain master node and configuring one or more other slave nodes of the first plurality of slave nodes as first subdomain slave nodes to the first subdomain master node.
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